Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 153
Z8F041APH020SG2156
Manufacturer Part Number
Z8F041APH020SG2156
Description
8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
Manufacturer
ZiLOG
Datasheet
1.Z8F082ASJ020EG2156.pdf
(282 pages)
Specifications of Z8F041APH020SG2156
Rohs
yes
Core
eZ8
Processor Series
Z8F041xx
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
4 KB
Data Ram Size
1 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
PDIP-20
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
8
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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PS022827-1212
Bit
Field
RESET
R/W
Address
Bit
[7]
REFSELH
[6:3]
[2:0]
BUFMODE[2:0]
ADC Data High Byte Register
REFSELH
R/W
7
1
The ADC Data High Byte (ADCD_H) Register contains the upper eight bits of the ADC
output. The output is an 13-bit two’s complement value. During a single-shot conversion,
this value is invalid. Access to the ADC Data High Byte Register is read-only. Reading the
ADC Data High Byte Register latches data in the ADC Low Bits Register.
Description
Voltage Reference Level Select High Bit
In conjunction with the Low bit (REFSELL) in ADC Control Register 0, this determines
the level of the internal voltage reference; the following details the effects of {REFSELH,
REFSELL}; this reference is independent of the Comparator reference.
00= Internal Reference Disabled, reference comes from external pin.
01= Internal Reference set to 1.0 V.
10= Internal Reference set to 2.0 V (default).
11= Reserved.
Reserved
These bits are reserved and must be programmed to 0000.
Input Buffer Mode Select
000 = Single-ended, unbuffered input.
001 = Single-ended, buffered input with unity gain.
010 = Reserved.
011 = Reserved.
100 = Differential, unbuffered input.
101 = Differential, buffered input with unity gain.
110 = Reserved.
111 = Reserved.
Table 74. ADC Control/Status Register 1 (ADCCTL1)
R/W
6
0
R/W
5
0
Reserved
P R E L I M I N A R Y
R/W
4
0
F71H
R/W
3
0
Z8 Encore! XP
ADC Control Register Definitions
R/W
2
0
BUFMODE[2:0]
Product Specification
R/W
1
0
®
F082A Series
R/W
0
0
136
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