Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 98
Z8F041APH020SG2156
Manufacturer Part Number
Z8F041APH020SG2156
Description
8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
Manufacturer
ZiLOG
Datasheet
1.Z8F082ASJ020EG2156.pdf
(282 pages)
Specifications of Z8F041APH020SG2156
Rohs
yes
Core
eZ8
Processor Series
Z8F041xx
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
4 KB
Data Ram Size
1 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
PDIP-20
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
8
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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PS022827-1212
3. Write to the Timer Reload High and Low Byte registers to set the reload value.
4. Clear the Timer PWM High and Low Byte registers to 0000H. This allows the soft-
5. Enable the timer interrupt, if appropriate and set the timer interrupt priority by writing
6. Configure the associated GPIO port pin for the Timer Input alternate function.
7. Write to the Timer Control Register to enable the timer and initiate counting.
In CAPTURE Mode, the elapsed time from timer start to Capture event can be calculated
using the following equation:
COMPARE Mode
In COMPARE Mode, the timer counts up to the 16-bit maximum Compare value stored in
the Timer Reload High and Low Byte registers. The timer input is the system clock. Upon
reaching the Compare value, the timer generates an interrupt and counting continues (the
timer value is not reset to
the Timer Output pin changes state (from Low to High or from High to Low) upon
Compare.
If the Timer reaches
Observe the following steps for configuring a timer for COMPARE Mode and initiating
the count:
1. Write to the Timer Control Register to:
Capture Elapsed Time (s)
ware to determine if interrupts were generated by either a capture event or a reload. If
the PWM High and Low Byte registers still contain 0000H after the interrupt, the
interrupt was generated by a Reload.
to the relevant interrupt registers. By default, the timer interrupt is generated for both
input capture and reload events. If appropriate, configure the timer interrupt to be gen-
erated only at the input capture event or the reload event by setting TICONFIG field
of the TxCTL0 Register.
–
–
–
Disable the timer
Configure the timer for COMPARE Mode
Set the prescale value
FFFFH
0001H
P R E L I M I N A R Y
, the timer rolls over to
=
-------------------------------------------------------------------------------------------------- -
). Also, if the Timer Output alternate function is enabled,
Capture Value
System Clock Frequency (Hz)
–
Start Value
0000H
Z8 Encore! XP
and continue counting.
Product Specification
Prescale
®
F082A Series
Operation
81
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