Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 55
Z8F041APH020SG2156
Manufacturer Part Number
Z8F041APH020SG2156
Description
8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
Manufacturer
ZiLOG
Datasheet
1.Z8F082ASJ020EG2156.pdf
(282 pages)
Specifications of Z8F041APH020SG2156
Rohs
yes
Core
eZ8
Processor Series
Z8F041xx
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
4 KB
Data Ram Size
1 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
PDIP-20
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
8
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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PS022827-1212
Direct LED Drive
Shared Reset Pin
Caution:
Caution:
PA0 and PA6 contain two different timer functions, a timer input and a complementary
timer output. Both of these functions require the same GPIO configuration, the selection
between the two is based on the timer mode. See
details.
The Port C pins provide a current sinked output capable of driving an LED without requir-
ing an external resistor. The output sinks current at programmable levels of 3 mA, 7 mA,
13 mA and 20 mA. This mode is enabled through the LED control registers. The LED
Drive Enable (LEDEN) Register turns on the drivers. The LED Drive Level (LEDLVLH
and LEDLVLL) registers select the sink current.
For correct function, the LED anode must be connected to V
GPIO pin. Using all Port C pins in LED drive mode with maximum current may result in
excessive total current. See
imum total current for the applicable package.
On the 20- and 28-pin devices, the PD0 pin shares function with a bidirectional reset pin.
Unlike all other I/O pins, this pin does not default to GPIO function on power-up. This pin
acts as a bidirectional input/open-drain output reset until the software reconfigures it. The
PD0 pin is an output-only open drain when in GPIO mode. There are no pull-up, High
Drive, or Stop Mode Recovery source features associated with the PD0 pin.
On the 8-pin product versions, the reset pin is shared with PA2, but the pin is not limited to
output-only when in GPIO mode.
For pins with multiple alternate functions, Zilog recommends writing to the AFS1 and
AFS2 subregisters before enabling the alternate function via the AF subregister. As a re-
sult, spurious transitions through unwanted alternate function modes will be prevented.
If PA2 on the 8-pin product is reconfigured as an input, ensure that no external stimulus
drives the pin low during any reset sequence. Since PA2 returns to its RESET alternate
function during system resets, driving it Low holds the chip in a reset state until the pin
is released.
P R E L I M I N A R Y
the
Electrical Characteristics
the
Timers
Z8 Encore! XP
chapter on page 226 for the max-
chapter on page 70
DD
and the cathode to the
Product Specification
®
Direct LED Drive
F082A Series
for more
38
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