DEMO9RS08KA2 Freescale Semiconductor, DEMO9RS08KA2 Datasheet - Page 43

• Manufacturer Part Number: DEMO9RS08KA2
• Description: DEMO BOARD FOR 9RS08KA2
• Manufacturer: Freescale Semiconductor
• Series: RS08r
• Type: MCUr

Specifications of DEMO9RS08KA2

• Contents: Board, Cable, CD, Documentation, Sample ICs
• Processor To Be Evaluated: RS08KA2
• Data Bus Width: 8 bit
• Interface Type: USB
• Silicon Manufacturer: Freescale
• Core Architecture: RS08
• Core Sub-architecture: RS08
• Silicon Core Number: MC9RS08
• Silicon Family Name: RS08KA
• Rohs Compliant: Yes
• For Use With/related Products: MC9RS08KA2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
5.8.5
This high page register contains status and control bits to support the low voltage detect function, and to
enable the bandgap voltage reference for use by the ACMP and the LVD module.
Freescale Semiconductor
This bit can be written only one time after reset. Additional writes are ignored.
Reset:
LVDACK
LVDRE
LVDSE
LVDIE
BGBE
LVDE
Field
LVDF
7
6
5
4
3
2
0
W
R
LVDF
System Power Management Status and Control 1 Register
(SPMSC1)
Low-Voltage Detect Flag — Provided LVDE = 1, this read-only status bit indicates a low-voltage detect event.
Low-Voltage Detect Acknowledge — This write-only bit is used to acknowledge low voltage detection errors
(write 1 to clear LVDF). Reads always return 0.
Low-Voltage Detect Interrupt Enable — This bit enables hardware interrupt requests for LVDF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVDF = 1.
Low-Voltage Detect Reset Enable — This write-once bit enables low-voltage detect events to generate a
hardware reset (provided LVDE = 1).
0 LVDF does not generate hardware resets.
1 Force an MCU reset when LVDF = 1.
Low-Voltage Detect Stop Enable — Provided LVDE = 1, this read/write bit determines whether the low-voltage
detect function operates when the MCU is in stop mode.
0 Low-voltage detect disabled during stop mode.
1 Low-voltage detect enabled during stop mode.
Low-Voltage Detect Enable — This write-once bit enables low-voltage detect logic and qualifies the operation
of other bits in this register.
0 LVD logic disabled.
1 LVD logic enabled.
Bandgap Buffer Enable — This bit enables an internal buffer for the bandgap voltage reference for use by the
ACMP module on one of its internal channels.
0 Bandgap buffer disabled.
1 Bandgap buffer enabled.
Figure 5-6. System Power Management Status and Control 1 Register (SPMSC1)
0
7
= Unimplemented or Reserved
LVDACK
0
0
6
Table 5-8. SPMSC1 Register Field Descriptions
MC9RS08KA2 Series Data Sheet, Rev. 4
LVDIE
0
5
LVDRE
1
4
(1)
Description
Chapter 5 Resets, Interrupts, and General System Control
LVDSE
3
1
LVDE
1
2
(1)
0
0
1
BGBE
0
0
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