82P2288BB IDT, Integrated Device Technology Inc, 82P2288BB Datasheet - Page 116

• Manufacturer Part Number: 82P2288BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2288BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

4.4.1
set in SPI mode.
with the microprocessor. A falling transition on CS pin indicates the start
of a read/write operation, and a rising transition indicates the end of the
operation. After the CS pin is set to low, two bytes include instruction
and address bytes on the SDI pin are input to the device on the rising
Instruction
4.4.2
parallel mode. In this mode, the interface is compatible with the Motorola
and the Intel microprocessor, which is selected by the MPM pin. The
IDT82P2288 uses separate address bus and data bus. The mode selec-
tion and the interfaced pin are tabularized in Table 80.
Instruction
Operation
IDT82P2288
SCLK
SCLK
SDO
SDO
SDI
SDI
CS
CS
Pull the SPIEN pin to high, and the microprocessor interface will be
In this mode, only the CS, SCLK, SDI and SDO pins are interfaced
Pull the SPIEN pin to low, the microprocessor interface will be set in
SPI MODE
PARALLEL MICROPROCESSOR INTERFACE
0
0
X
X
1
1
X
X
2
2
X A11 A10 A9
X A11 A10
3
3
4
4
High Impedance
High Impedance
5
5
A9
Figure 40. Write Operation In SPI Mode
Figure 39. Read Operation In SPI Mode
6
6
A8
A8
7
7
Register Address
A7 A6 A5 A4 A3 A2 A1
A7 A6 A5 A4 A3 A2 A1
8
Register Address
8
9
9
10
10
116
11 12 13 14 15 16 17 18 19 20 21 22 23
11 12 13 14 15 16 17 18 19 20 21 22 23
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
edge of the SCLK pin. First byte consists of one instruction bit at MSB
and three address bits at LSB, and the second byte is low 8 address
bits. If the MSB is ‘1’, it is read operation. If the MSB is ‘0’, it is write
operation. If the device is in read operation, the data read from the spec-
ified register is output on the SDO pin on the falling edge of the SCLK
(refer to Figure 39). If the device is in write operation, the data written to
the specified register is input on the SDI pin following the address byte
(refer to Figure 40).
Table 80: Parallel Microprocessor Interface
Pin MPM
High
Low
Microprocessor Interface
A0
A0
D7 D6 D5 D4 D3 D2 D1
D7 D6 D5 D4 D3 D2 D1
Motorola
Intel
Data Byte
Don't Care
CS, RD, WR, A[10:0], D[7:0]
CS, DS, RW, A[10:0], D[7:0]
JANUARY 10, 2011
Interfaced Pin
D0
D0