82P2288BB IDT, Integrated Device Technology Inc, 82P2288BB Datasheet - Page 5

• Manufacturer Part Number: 82P2288BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2288BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

4 OPERATION .................................................................................................................................................................. 115
5 PROGRAMMING INFORMATION ................................................................................................................................. 118
6 IEEE STD 1149.1 JTAG TEST ACCESS PORT ........................................................................................................... 339
Table of Contents
IDT82P2288
3.24 WAVEFORM SHAPER / LINE BUILD OUT ............................................................................................................................................... 100
3.25 LINE DRIVER ............................................................................................................................................................................................. 109
3.26 TRANSMITTER IMPEDANCE MATCHING ............................................................................................................................................... 109
3.27 TESTING AND DIAGNOSTIC FACILITIES ............................................................................................................................................... 109
3.28 INTERRUPT SUMMARY ............................................................................................................................................................................ 113
4.1 POWER-ON SEQUENCE ........................................................................................................................................................................... 115
4.2 RESET ........................................................................................................................................................................................................ 115
4.3 RECEIVE / TRANSMIT PATH POWER DOWN ......................................................................................................................................... 115
4.4 MICROPROCESSOR INTERFACE ........................................................................................................................................................... 115
4.5 INDIRECT REGISTER ACCESS SCHEME ............................................................................................................................................... 117
5.1 REGISTER MAP ......................................................................................................................................................................................... 118
5.2 REGISTER DESCRIPTION ........................................................................................................................................................................ 134
6.1 JTAG INSTRUCTIONS AND INSTRUCTION REGISTER (IR) .................................................................................................................. 339
6.2 JTAG DATA REGISTER ............................................................................................................................................................................ 340
6.3 TEST ACCESS PORT CONTROLLER ...................................................................................................................................................... 343
3.24.1 Preset Waveform Template ......................................................................................................................................................... 100
3.24.2 Line Build Out (LBO) (T1 Only) ................................................................................................................................................... 101
3.24.3 User-Programmable Arbitrary Waveform .................................................................................................................................. 101
3.27.1 PRBS Generator / Detector ......................................................................................................................................................... 109
3.27.2 Loopback ...................................................................................................................................................................................... 111
3.27.3 G.772 Non-Intrusive Monitoring .................................................................................................................................................. 111
4.4.1
4.4.2
4.5.1
4.5.2
5.1.1
5.1.2
5.2.1
5.2.2
6.2.1
6.2.2
6.2.3
3.24.1.1 T1/J1 Mode .................................................................................................................................................................... 100
3.24.1.2 E1 Mode ......................................................................................................................................................................... 101
3.27.1.1 Pattern Generator ........................................................................................................................................................... 110
3.27.1.2 Pattern Detector ............................................................................................................................................................. 110
3.27.2.1 System Loopback ........................................................................................................................................................... 111
3.27.2.2 Payload Loopback .......................................................................................................................................................... 111
3.27.2.3 Local Digital Loopback 1 ................................................................................................................................................ 111
3.27.2.4 Remote Loopback .......................................................................................................................................................... 111
3.27.2.5 Local Digital Loopback 2 ................................................................................................................................................ 111
3.27.2.6 Analog Loopback ............................................................................................................................................................ 111
SPI Mode ....................................................................................................................................................................................... 116
Parallel Microprocessor Interface .............................................................................................................................................. 116
Indirect Register Read Access ................................................................................................................................................... 117
Indirect Register Write Access ................................................................................................................................................... 117
T1/J1 Mode .................................................................................................................................................................................... 118
5.1.1.1
5.1.1.2
E1 Mode ........................................................................................................................................................................................ 126
5.1.2.1
5.1.2.2
T1/J1 Mode .................................................................................................................................................................................... 135
5.2.1.1
5.2.1.2
E1 Mode ........................................................................................................................................................................................ 236
5.2.2.1
5.2.2.2
Device Identification Register (IDR) ........................................................................................................................................... 340
Bypass Register (BYP) ................................................................................................................................................................ 340
Boundary Scan Register (BSR) ................................................................................................................................................... 340
Direct Register ................................................................................................................................................................ 118
Indirect Register ............................................................................................................................................................. 125
Direct Register ................................................................................................................................................................ 126
Indirect Register ............................................................................................................................................................. 132
Direct Register ................................................................................................................................................................ 135
Indirect Register ............................................................................................................................................................. 228
Direct Register ................................................................................................................................................................ 236
Indirect Register ............................................................................................................................................................. 329
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OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
JANUARY 10, 2011