82P2288BB IDT, Integrated Device Technology Inc, 82P2288BB Datasheet - Page 125

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82P2288BB

Manufacturer Part Number
82P2288BB
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2288BB

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant

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5.1.1.2 Indirect Register
PMON
RCRB
RPLC
TPLC
Programming Information
IDT82P2288
Address (Hex)
Address (Hex)
Address (Hex)
Address
01 ~ 18
21 ~ 38
41 ~ 58
01 ~ 18
01 ~ 18
21 ~ 38
41 ~ 58
(Hex)
0A
0B
00
01
02
03
04
05
06
07
08
09
SUBST2
PRGD15
SUBST2 SUBST1
CRCE7
PRGD7
DTRK7
DDSE7
DTRK7
LCV15
FER7
LCV7
Bit 7
Bit 7
Bit 7
Bit 7
-
-
-
-
-
-
-
-
SUBST1
PRGD14
PRGD6
DTRK6
DTRK6
CRCE6
DDSE6
Bit 6
LCV14
TEST
TEST
FER6
LCV6
Bit 6
Bit 6
Bit 6
-
-
-
-
-
-
SUBST0
Bit 5
SUBST0
PRGD13
DTRK5
SIGINS
DTRK5
CRCE5
PRGD5
DDSE5
LCV13
Bit 5
FER5
LCV5
-
Bit 5
Bit 5
-
-
-
-
-
-
EXTRACT
Bit 4
DTRK4
STRKE
DTRK4
STRKE
PRGD12
SINV
Bit 4
CRCE4
PRGD4
DDSE4
SINV
LCV12
Bit 4
OOF4
FER4
LCV4
Bit 4
N
N
-
-
-
-
DTRK3
Bit 3
DTRK3
OINV
Bit 3
OINV
Bit 3
PRGD11
A
CRCE3
PRGD3
DDSE3
FER11
LCV11
A
OOF3
A
FER3
LCV3
Bit 3
-
-
-
Bit 2
DTRK2
DTRK2
EINV
EINV
B
Bit 2
Bit 2
PRGD10
B
B
125
PRGD2
CRCE2
COFA2
DDSE2
FER10
LCV10
OOF2
FER2
LCV2
Bit 2
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
-
-
Bit 1
DTRK1
DTRK1
G56K
C
G56K
Bit 1
Bit 1
C
C
CRCE1
CRCE9
PRGD1
PRGD9
COFA1
DDSE1
DDSE9
OOF1
FER1
FER9
LCV1
LCV9
Bit 1
Bit 0
DTRK0
DTRK0
D
Bit 0
GAP
Bit 0
GAP
D
D
CRCE0
CRCE8
PRGD0
PRGD8
COFA0
DDSE0
DDSE8
OOF0
FER0
FER8
LCV0
LCV8
Bit 0
Extracted Signaling Data/Extract
Enable Register for CH1 ~ CH24
Code Register for CH1 ~ CH24
Code Register for CH1 ~ CH24
Data Trunk Conditioning Code
Data Trunk Conditioning Code
Channel Control Register for
Signaling Trunk Conditioning
Signaling Trunk Conditioning
Channel Control Register for
Register for CH1 ~ CH24
Register for CH1 ~ CH24
PRGD Counter Mapping 0
CRCE Counter Mapping 0
CRCE Counter Mapping 1
PRGD Counter Mapping 1
DDSE Counter Mapping 0
DDSE Counter Mapping 1
FER Counter Mapping 0
FER Counter Mapping 1
LCV Counter Mapping 0
LCV Counter Mapping 1
COFA Counter Mapping
OOF Counter Mapping
CH1 ~ CH24
CH1 ~ CH24
Register
Register
Register
Register
JANUARY 10, 2011
Reference Page
Reference Page
Reference Page
Reference Page
P 231
P 234
P 235
P 235
P 228
P 228
P 228
P 229
P 229
P 229
P 229
P 230
P 230
P 230
P 230
P 231
P 232
P 233
P 233

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