82P2288BB IDT, Integrated Device Technology Inc, 82P2288BB Datasheet - Page 186

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82P2288BB

Manufacturer Part Number
82P2288BB
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2288BB

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant

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T1/J1 Transmit Timing Option (070H, 170H, 270H, 370H, 470H, 570H, 670H, 770H)
XTS:
T1/J1 PRGD Control (071H, 171H, 271H, 371H, 471H, 571H, 671H, 771H)
RINV:
TINV:
PATS[1:0]:
Programming Information
IDT82P2288
Bit Name
Bit Name
In Transmit Clock Master mode:
= 0: The source of the transmit clock is selected from the clock generated by the internal clock generator (1.544 MHz).
= 1: The source of the transmit clock is selected from the recovered clock from the line side.
In Transmit Clock Master mode, the Transmit Buffer is bypassed automatically.
In Transmit Clock Slave T1/J1 mode E1 rate, this bit is invalid. In the other Transmit Clock Slave modes and in Transmit Multiplexed mode:
= 0: The source of the transmit clock is selected from the clock from the backplane. The Transmit Buffer is bypassed.
= 1: The source of the transmit clock is selected from the clock generated by the internal clock generator (1.544 MHz). The Transmit Buffer is not
bypassed.
= 0: The data is not inverted before extracted to the pattern detector.
= 1: The data is inverted before extracted to the pattern detector.
= 0: The generated pattern is not inverted.
= 1: The generated pattern is inverted.
These bits select the PRBS generated and detected pattern.
= 00: The 2
= 01: The 2
= 10: The 2
= 11: Reserved.
Default
Default
Bit No.
Bit No.
Type
Type
15
20
11
-1 pattern per O.150 is selected.
-1 pattern per O.152 is selected.
-1 pattern per O.150-4.5 is selected.
7
7
6
6
Reserved
5
5
Reserved
4
4
186
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
RINV
R/W
3
3
0
TINV
R/W
2
2
0
PATS1
R/W
1
1
0
JANUARY 10, 2011
PATS0
XTS
R/W
R/W
0
0
0
0

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