82P2288BB IDT, Integrated Device Technology Inc, 82P2288BB Datasheet - Page 81

• Manufacturer Part Number: 82P2288BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2288BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

3.18.1.1 Transmit Clock Master Mode
signal on the TSCKn pin and framing pulse on the TSFSn pin to input
the data on each TSDn pin. The signaling bits on the TSIGn pin are per-
channel aligned with the data on the TSDn pin.
is clocked by the TSCKn. The active edge of the TSCKn used to update
the pulse on the TSFSn is determined by the FE bit. The active edge of
the TSCKn used to sample the data on the TSDn and TSIGn is deter-
mined by the DE bit. If the FE bit and the DE bit are not equal, the pulse
on the TSFSn is ahead.
bit or the first F-bit of every SF/ESF/T1 DM/SLC-96 multi-frame. The
indications are selected by the FSTYP bit. The active polarity of the
TSFSn is selected by the FSINV bit.
Clock Master Full T1/J1 mode and Transmit Clock Master Fractional T1/
J1 mode.
Transmit Clock Master Full T1/J1 Mode
Master mode, the special feature in this mode is that the TSCKn is a
standard 1.544 MHz clock, and the data in the F-bit and all 24 channels
in a standard T1/J1 frame are clocked in by the TSCKn.
Transmit Clock Master Fractional T1/J1 Mode
Master mode, the special feature in this mode is that the TSCKn is a
gapped 1.544 MHz clock (no clock signal during the selected channel).
2.048
1.544
Mb/s
Mb/s
Functional Description
IDT82P2288
In the Transmit Clock Master mode, each link uses its own timing
In the Transmit Clock Master mode, the data on the system interface
In the Transmit Clock Master mode, the TSFSn can indicate each F-
The Transmit Clock Master mode includes two sub-modes: Transmit
Besides all the common functions described in the Transmit Clock
Besides all the common functions described in the Transmit Clock
discarded
F
TS0
CH1
TS1
CH2
TS2
Figure 25. E1 To T1/J1 Format Mapping - G.802 Mode
CH14
TS14 TS15 TS16 TS17 TS18
CH15
discarded
CH16
CH17
81
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
The TSCKn is also gapped during the channels or the Bit 8 duration by
selecting the G56K & GAP bits in the Transmit Payload Control. The
data in the corresponding gapped duration is a Don't Care condition.
3.18.1.2 Transmit Clock Slave Mode
Mb/s or 2.048 Mb/s. If the system data rate is 1.544 Mb/s, it works in T1/
J1 mode. If the system data rate is 2.048 Mb/s, the data stream to be
transmitted should be mapped to 1.544 Mb/s, that is, to work in T1/J1
mode E1 rate. Three kinds of schemes are provided by selecting the
MAP[1:0] bits:
The TSCKn is gapped during the F-bit if the FBITGAP bit is set to ‘1’.
In the Transmit Clock Slave mode, the system data rate can be 1.544
• T1/J1 Mode E1 Rate per G.802 (refer to Figure 25): TS1 to TS15
• T1/J1 Mode E1 Rate per One Filler Every Fourth CHs (refer to
• T1/J1 Mode E1 Rate per Continuous CHs (refer to Figure 27): TS1
of Frame N on the system side are converted into Channel 1 to
Channel 15 of Frame N to the device; TS17 to TS25 of Frame N on
the system side are converted into Channel 16 to Channel 24 of
Frame N to the device. The first bit of TS26 of Frame (N-1) on the
system side is converted into the F-bit of Frame N to the device.
TS0, TS16, TS27~TS31 and the other 7 bits in TS26 on the sys-
tem side are all discarded.
Figure 26): The 8th bit of Frame N on the system side is converted
to the F-bit of the Frame N to the device. Then one byte of the sys-
tem side is discarded after the previous three bytes are converted
into the device. This process repeats 8 times and the conversion of
one frame is completed. Then the process goes on.
to TS24 of Frame N on the system side are converted into Channel
1 to Channel 24 of Frame N to the device. The 8th bit of Frame N
on the system side is converted into the F-bit of Frame N to the
device. The first 7 bits and TS25 to TS31 on the system side are all
discarded.
CH23
TS24 TS25
CH24
the 1st bit
F
discarded discarded discarded
TS26 TS27~TS31
CH1
CH2
JANUARY 10, 2011
TS0
CH23
TS1