82P2281PFG IDT, Integrated Device Technology Inc, 82P2281PFG Datasheet - Page 151

• Manufacturer Part Number: 82P2281PFG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2281PFG

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

T1/J1 TBIF TS Offset (044H)
TSOFF[6:0]:
start of the corresponding frame input on the TSD/MTSD pin. The signaling bits on the TSIG/MTSIG pin are always per-channel aligned with the data
on the TSD/MTSD pin.
set can be configured from 0 to 127 channels (0 & 127 are included).
T1/J1 TBIF Bit Offset (045H)
EDGE:
BOFF[2:0]:
corresponding frame input on the TSD/MTSD pin. The signaling bits on the TSIG/MTSIG pin are always per-channel aligned with the data on the TSD/
MTSD pin.
Programming Information
IDT82P2281
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
These bits give a binary number to define the channel offset. The channel offset is between the framing pulse on the TSFS/MTSFS pin and the
In Non-multiplexed mode, the channel offset can be configured from 0 to 23 channels (0 & 23 are included). In Multiplexed mode, the channel off-
This bit is valid when the CMS bit (b2, T1/J1-042H) is ‘1’.
= 0: The first active edge of TSCK/MTSCK is selected to sample the data on the TSD/MTSD and TSIG/MTSIG pins.
= 1: The second active edge of TSCK/MTSCK is selected to sample the data on the TSD/MTSD and TSIG/MTSIG pins.
These bits give a binary number to define the bit offset. The bit offset is between the framing pulse on the TSFS/MTSFS pin and the start of the
Reserved
7
7
TSOFF6
R/W
6
0
6
Reserved
TSOFF5
R/W
5
0
5
TSOFF4
R/W
4
0
4
151
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
TSOFF3
EDGE
R/W
R/W
3
0
3
0
TSOFF2
BOFF2
R/W
R/W
2
0
2
0
TSOFF1
BOFF1
R/W
R/W
1
0
1
0
August 20, 2009
TSOFF0
BOFF0
R/W
R/W
0
0
0
0