82P2281PFG IDT, Integrated Device Technology Inc, 82P2281PFG Datasheet - Page 43

• Manufacturer Part Number: 82P2281PFG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2281PFG

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

IDT82P2281
3.8.2.1.2
the data stream. The structure of TS0 of the CRC Multi-Frame is illus-
trated in Table 18.
– 15) which are numbered from a Basic Frame with FAS. Each CRC
Multi-Frame can be divided into two Sub Multi-Frames (SMF I & SMF II).
sor initiates an 8 and a 400 ms timer to check the CRC Multi-Frame
alignment signal if the CRCEN bit is ‘1’. The CRC Multi-Frame synchro-
nization is declared with a ‘0’ in the OOCMFV bit only if at least two CRC
Multi-Frame alignment patterns are found within 8 ms, with the interval
time of each pattern being a multiple of 2 ms. Then if the received CRC
Multi-Frame alignment signal does not meet its pattern, it will be indi-
cated by the CMFERI bit.
within 8ms with the interval time being a multiple of 2 ms, an offline
search for the Basic Frame alignment pattern will start which is indicated
in the OOOFV bit. The process is the same as shown in Figure 12. This
offline operation searches in parallel with the pre-found Basic Frame
synchronization searching process. After the new Basic Frame synchro-
nization is found by this offline search, the 8 ms timer is restarted to
check whether the two CRC Multi-Frame alignment patterns are found
within 8 ms, with the interval time of each pattern being a multiple of 2
ms again. If the condition can not be met, the procedure will go on until
the 400 ms timer ends. If the condition still can not be met at that time
and the Basic Frame is still synchronized, the device declares by the
C2NCIWV bit to run under the CRC to non-CRC interworking process. In
Functional Description
Table 18: The Structure Of TS0 In CRC Multi-Frame
Multi-Frame
CRC-4
The CRC Multi-Frame is provided to enhance the ability of verifying
A CRC Multi-Frame consists of 16 continuous Basic Frames (No. 0
After the Basic Frame has been synchronized, the Frame Proces-
If the 2 CRC Multi-Frame alignment patterns can not be found
CRC Multi-Frame
SMF II
SMF I
SMF
Basic Frame
No. / Type
13 / NFAS
15 / NFAS
11 / NFAS
1 / NFAS
3 / NFAS
5 / NFAS
7 / NFAS
9 / NFAS
10 / FAS
12 / FAS
14 / FAS
0 / FAS
2 / FAS
4 / FAS
6 / FAS
8 / FAS
1 (Si bit)
C1
C2
C3
C4
C1
C2
C3
E1
C4
E2
0
0
1
0
1
1
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
43
3
0
A
0
A
0
A
0
A
0
A
0
A
0
A
0
A
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
The Si bit in each even frame is the CRC bit. Thus, there are C1, C2,
C3, C4 in each SMF. The C1 is the most significant bit, while the C4 is
the least significant bit. The Si bit in the first six odd frames is the CRC
Multi-Frame alignment pattern. Its pattern is ‘001011’. The Si bit in
Frame 13 and Frame 15 are E1 and E2 bits. The value of the E bits can
indicate the Far End Block Errors (FEBE).
this process, the CRC Multi-Frame alignment pattern can still be
searched if the C2NCIWCK bit is logic 1.
The first bit of TS0 of each frame is called the International (Si) bit.
the Eight Bits in Timeslot 0
Sa4
Sa4
Sa4
Sa4
Sa4
Sa4
Sa4
Sa4
4
1
1
1
1
1
1
1
1
Sa5
Sa5
Sa5
Sa5
Sa5
Sa5
Sa5
Sa5
5
1
1
1
1
1
1
1
1
Sa6
Sa6
Sa6
Sa6
Sa6
Sa6
Sa6
Sa6
6
0
0
0
0
0
0
0
0
Sa7
Sa7
Sa7
Sa7
Sa7
Sa7
Sa7
Sa7
7
1
1
1
1
1
1
1
1
August 20, 2009
Sa8
Sa8
Sa8
Sa8
Sa8
Sa8
Sa8
Sa8
8
1
1
1
1
1
1
1
1