82P2281PFG IDT, Integrated Device Technology Inc, 82P2281PFG Datasheet - Page 50

• Manufacturer Part Number: 82P2281PFG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2281PFG

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

IDT82P2281
3.9.2
formance monitoring. For different framing format, the counters are used
differently. The overflow of each counter is reflected by an Overflow Indi-
cation Bit, and can trigger an interrupt if the corresponding Overflow
Interrupt Enable Bit is set. This is shown in Table 22.
indirect registers every one second automatically if the AUTOUPD bit is
‘1’;
Functional Description
Table 24: Monitored Events In E1 Mode
Bipolar Violation (BPV) Error (in AMI decoding) or HDB3 Code Violation (CV) Error (in HDB3 decoding)
FAS/NFAS Bit/Pattern Error
CRC-4 Error
Far End Block Error
The the new-found Basic frame alignment pattern position differs from the previous one
Out of Basic frame synchronization
PRGD Bit Error
NT FEBE Error
NT CRC Error
Several internal counters are used to count different events for per-
The internal counters can be updated in two ways:
1. Auto-Update: Content in the internal counters is transferred to
E1 MODE
Event
50
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
indirect registers when there is a transition from ‘0’ to ‘1’ on the UPDAT
bit, no matter whether the AUTOUPD bit is ‘1’ or ‘0’.
start a new round of counting. No error event is lost during the update.
ADDR[3:0] bits select the specific PMON indirect register. Data read
from the indirect register is held in the DAT[7:0] bits.
2. Manual-Update: Content in the internal counters is transferred to
All the internal counters will be resetted after the update and will
The indirect registers are addressed by the ADDR[3:0] bits. The
PRGD[15:0]
TCRCE[9:0]
TFEBE[9:0]
CRCE[9:0]
COFA[2:0]
FEBE[9:0]
LCV[15:0]
FER[11:0]
OOF[4:0]
Counter
Overflow Interrupt
Indication Bit
TFEBEOVI
PRGDOVI
COFAOVI
TCRCOVI
FEBEOVI
CRCOVI
OOFOVI
FEROVI
LCVOVI
August 20, 2009
Overflow Interrupt
TFEBEOVE
PRGDOVE
Enable Bit
COFAOVE
TCRCOVE
FEBEOVE
OOFOVE
CRCOVE
LCVOVE
FEROVE