82P2281PFG IDT, Integrated Device Technology Inc, 82P2281PFG Datasheet - Page 52

• Manufacturer Part Number: 82P2281PFG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2281PFG

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

IDT82P2281
3.10
3.10.1
block (refer to Table 26).
Table 26: RED Alarm, Yellow Alarm & Blue Alarm Criteria
Functional Description
Note: * The Yellow Alarm can only be detected when the frame is synchronized.
Yellow
Alarm*
(per T1.403,
(per T1.231)
Blue Alarm
RED Alarm
The RED alarm, Yellow alarm and Blue alarm are detected in this
T1.231)
SLC-96
ALARM DETECTOR
Format
T1 ESF
Format
Format
Format
J1 ESF
Format
T1 SF/
T1 DM
J1 SF
T1/J1 MODE
The out of SF/ESF/T1 DM/SLC-96 syn-
chronization status persists Nx40 ms. Here
‘N’ is decided by the REDDTH[7:0] bits.
Less than 77 ’One’s are detected on the Bit
2 of each channel during a 40 ms fixed win-
dow and this status persists for Nx40 ms.
Here ‘N’ is decided by the YELDTH[7:0]
bits.
More than 7 ‘0xFF00’ (MSB first) are
detected on the DL bits during a 40 ms
fixed window and this status persists for
Nx40 ms. Here ‘N’ is decided by the
YELDTH[7:0] bits.
Less than 4 ’One’s are detected on the Y
bit (Bit 6 in each CH 24) during a 40 ms
fixed window and this status persists for
Nx40 ms. Here ‘N’ is decided by the
YELDTH[7:0] bits.
Less than 4 zeros are detected on the F-bit
of the 12nd frame during a 40 ms fixed win-
dow and this status persists for Nx40 ms.
Here ‘N’ is decided by the YELDTH[7:0]
bits.
Less than 3 zeros are detected on the DL
bits during a 40 ms fixed window and this
status persists for Nx40 ms. Here ‘N’ is
decided by the YELDTH[7:0] bits.
Less than 61 zeros are detected in a 40 ms
fixed window and this status persists for
Nx40 ms. Here ‘N’ is decided by the AIS-
DTH[7:0] bits.
Declare Condition
The in SF/ESF/T1 DM/SLC-96 synchro-
nization status persists Mx120 ms. Here
‘M’ is decided by the REDCTH[7:0] bits.
More than 76 ’One’s are detected on the
Bit 2 of each channel during a 40 ms
fixed window and this status persists for
Mx40 ms. Here ‘M’ is decided by the
YELCTH[7:0] bits.
Less than 8 ‘0xFF00’ (MSB first) are
detected on the DL bits during a 40 ms
fixed window and this status persists for
Mx40 ms. Here ‘M’ is decided by the
YELCTH[7:0] bits.
More than 3 ’One’s are detected on the
Y bit (Bit 6 in each CH 24) during a 40
ms fixed window and this status persists
for Mx40 ms. Here ‘M’ is decided by the
YELCTH[7:0] bits.
More than 3 zeros are detected on the
F-bit of the 12nd frame during a 40 ms
fixed window and this status persists for
Mx40 ms. Here ‘M’ is decided by the
YELCTH[7:0] bits.
More than 2 zeros are detected on the
DL bits during a 40 ms fixed window and
this status persists for Mx40 ms. Here
‘M’ is decided by the YELCTH[7:0] bits.
More than 60 zeros are detected in a 40
ms fixed window and this status persists
for Mx40 ms. Here ‘M’ is decided by the
AISCTH[7:0] bits.
Clear Condition
52
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
cated by the corresponding Status bit. Any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the Status bit will set the corresponding Interrupt Indi-
cation bit to ‘1’ and the Interrupt Indication bit will be cleared by writing a
‘1’. A ‘1’ in the Interrupt Indication bit means there is an interrupt. The
interrupt will be reported by the INT pin if its Interrupt Enable bit is ‘1’.
The status of the RED alarm, Yellow alarm and Blue alarm are indi-
Status Bit Interrupt Indication Bit Interrupt Enable Bit
RED
YEL
YEL
YEL
YEL
YEL
AIS
REDI
YELI
YELI
YELI
YELI
YELI
AISI
August 20, 2009
REDE
YELE
YELE
YELE
YELE
YELE
AISE