82P2281PFG IDT, Integrated Device Technology Inc, 82P2281PFG Datasheet - Page 78

• Manufacturer Part Number: 82P2281PFG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2281PFG

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

3.19
transmitted or the data stream to be transmitted can be extracted to the
PRBS Generator/Detector for test in this block.
PCCE bit must be set to ‘1’.
TSD/MTSD pins on a per-channel/per-TS basis or on a global basis (the
methods are arranged from the highest to the lowest in priority):
data to be transmitted will be extracted to the PRBS Generator/Detector.
The data to be transmitted can be extracted in unframed mode, in 8-bit-
based mode or in 7-bit-based mode. This selection is made by the PRB-
SMODE[1:0] bits. In unframed mode, all the data stream to be transmit-
ted is extracted and the per-channel/per-TS configuration in the TEST
bit is ignored. In 8-bit-based mode or in 7-bit-based mode, the data will
only be extracted on the channel/timeslot configured by the TEST bit.
Refer to Chapter 3.27.1 PRBS Generator / Detector for details.
pression can be selected to implement to the data of all the channels.
This function is only supported in T1/J1 mode.
timeslots will be replaced by the trunk code set in the DTRK[7:0] bits, the
milliwatt pattern defined in Table 36 and Table 37, or the payload loop-
back data from the Elastic Store Buffer (refer to Chapter 3.27.2.2 Pay-
load Loopback). When the GSUBST[2:0] bits are set to ‘000’, these
replacements will be performed on a per-channel/per-TS basis by set-
ting the SUBST[2:0] bits in the corresponding channel/timeslot.
TSIG/MTSIG pins (after processed by the signaling trunk conditioning
replacement and/or valid signaling bits selection) can be inserted into its
signaling bit position of the data stream to be transmitted.
setting the SINV, OINV, EINV bits.
data to be transmitted will be replaced by the test pattern generated
from the PRBS Generator/Detector. The data to be transmitted can be
replaced in unframed mode, in 8-bit-based mode or in 7-bit-based
mode. This selection is made by the PRBSMODE[1:0] bits. In unframed
mode, all the data stream to be transmitted is replaced and the per-
channel/per-TS configuration in the TEST bit is ignored. In 8-bit-based
mode or in 7-bit-based mode, the data will only be replaced on the chan-
nel/timeslot configured by the TEST bit. Refer to Chapter 3.27.1 PRBS
Generator / Detector for details.
from the TSIG/MTSIG pins on a per-channel/per-TS basis or on a global
basis . The processed signaling bits will be inserted to the data stream to
be transmitted if frame is generated. The methods are arranged from the
highest to the lowest in priority:
upper 2-bit positions of the lower nibble of each channel or in the lower
nibble of each channel. The other bits of the channel are Don’t Care
conditions. This function is only supported in T1/J1 mode ESF/SLC-96
format.
IDT82P2281
Different test patterns can be inserted in the data stream to be
To enable all the functions in the Transmit Payload Control, the
The following methods can be executed on the data input from the
- When the TESTEN bit is enabled and the PRBSDIR bit is ‘1’, the
- Configured by the ZCS[2:0] bits, four types of Zero Code Sup-
- Selected by the GSUBST[2:0] bits, the data of all channels/
- Controlled by the SIGINS bit, the signaling bits input from the
- Invert the most significant bit, the even bits and/or the odd bits by
- When the TESTEN bit is enabled and the PRBSDIR bit is ‘0’, the
The following methods can be executed on the signaling bits input
- Selected by the ABXX bit, the signaling bits can be valid in the
TRANSMIT PAYLOAD CONTROL
78
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
cuted. The signaling snapshot means that the signaling bits of the first
basic frame are locked and output as the signaling bits of the current
whole multi-frame. This function is not supported in T1 DM format.
channels/timeslots will be replaced by the signaling trunk conditioning
code in the A,B,C,D bits. When the GSTRKEN bit is ‘0’, the replacement
can be performed on a per-channel/per-TS basis by setting the
STRKEN bit in the corresponding channel/timeslot.
by specifying the address in the ADDRESS[6:0] bits. Whether the data is
read from or written into the specified indirect register is determined by
the RWN bit and the data is in the D[7:0] bits. The access status is indi-
cated in the BUSY bit. Refer to Chapter 4.5 Indirect Register Access
Scheme for details about the indirect registers write/read access.
Table 45: Related Bit / Register In Chapter 3.19
Note:
* ID means Indirect Register in the Transmit Payload Control function block.
ZCS[2:0] (T1/J1 only)
SIGINS (T1/J1 only)
ABXX (T1/J1 only)
PRBSMODE[1:0]
ADDRESS[6:0]
GSUBST[2:0]
- Enabled by the SIGSNAP bit, the signaling snapshot will be exe-
- Enabled by the GSTRKEN bit, the signaling bits (ABCD) of all
The indirect registers of the Transmit Payload Control are accessed
SUBST[2:0]
GSTRKEN
DTRK[7:0]
PRBSDIR
SIGSNAP
STRKEN
TESTEN
A,B,C,D
PCCE
D[7:0]
BUSY
TEST
OINV
SINV
EINV
RWN
Bit
ID * - Data Trunk Conditioning
ID * - Channel Control (for T1/
J1) / Timeslot Control (for E1)
ID * - Signaling Trunk Condi-
TPLC / RPLC / PRGD Test
TPLC Access Control
TPLC Control Enable
TPLC Access Status
TPLC Configuration
TPLC Access Data
Configuration
tioning Code
Register
Code
T1/J1) / 41~4F & 51~5F
T1/J1) / 20~3F (for E1)
T1/J1) / 00~1F (for E1)
TPLC ID * - 41~58 (for
TPLC ID * - 21~38 (for
TPLC ID * - 01~18 (for
August 20, 2009
Address (Hex)
(for E1)
0CC
0CB
0CA
0C7
0C9
0C8