82P2281PFG IDT, Integrated Device Technology Inc, 82P2281PFG Datasheet - Page 4

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82P2281PFG

Manufacturer Part Number
82P2281PFG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2281PFG

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
82P2281PFG
Manufacturer:
IDT
Quantity:
112
IDT82P2281
Table of Contents
3.9 PERFORMANCE MONITOR ......................................................................................................................................................................... 48
3.10 ALARM DETECTOR ..................................................................................................................................................................................... 52
3.11 HDLC RECEIVER .......................................................................................................................................................................................... 55
3.12 BIT-ORIENTED MESSAGE RECEIVER ....................................................................................................................................................... 58
3.13 INBAND LOOPBACK CODE DETECTOR (T1/J1 ONLY) ............................................................................................................................ 58
3.14 ELASTIC STORE BUFFER ........................................................................................................................................................................... 59
3.15 RECEIVE CAS/RBS BUFFER ...................................................................................................................................................................... 59
3.16 RECEIVE PAYLOAD CONTROL .................................................................................................................................................................. 62
3.17 RECEIVE SYSTEM INTERFACE .................................................................................................................................................................. 64
3.18 TRANSMIT SYSTEM INTERFACE ............................................................................................................................................................... 71
3.9.1
3.9.2
3.10.1 T1/J1 Mode ...................................................................................................................................................................................... 52
3.10.2 E1 Mode .......................................................................................................................................................................................... 54
3.11.1 HDLC Channel Configuration ........................................................................................................................................................ 55
3.11.2 HDLC Mode ..................................................................................................................................................................................... 55
3.15.1 T1/J1 Mode ...................................................................................................................................................................................... 59
3.15.2 E1 Mode .......................................................................................................................................................................................... 60
3.17.1 T1/J1 Mode ...................................................................................................................................................................................... 64
3.17.2 E1 Mode .......................................................................................................................................................................................... 69
3.18.1 T1/J1 Mode ...................................................................................................................................................................................... 71
3.18.2 E1 Mode .......................................................................................................................................................................................... 76
3.8.2.4
3.8.2.5
T1/J1 Mode ...................................................................................................................................................................................... 48
E1 Mode .......................................................................................................................................................................................... 50
3.17.1.1 Receive Clock Master Mode ............................................................................................................................................ 64
3.17.1.2 Receive Clock Slave Mode .............................................................................................................................................. 65
3.17.1.3 Receive Multiplexed Mode ............................................................................................................................................... 66
3.17.1.4 Offset ................................................................................................................................................................................ 66
3.17.1.5 Output On RSD/MRSD & RSIG/MRSIG ........................................................................................................................... 69
3.17.2.1 Receive Clock Master Mode ............................................................................................................................................ 69
3.17.2.2 Receive Clock Slave Mode .............................................................................................................................................. 69
3.17.2.3 Receive Multiplexed Mode ............................................................................................................................................... 70
3.17.2.4 Offset ................................................................................................................................................................................ 70
3.17.2.5 Output On RSD/MRSD & RSIG/MRSIG ........................................................................................................................... 70
3.18.1.1 Transmit Clock Master Mode ............................................................................................................................................ 71
3.18.1.2 Transmit Clock Slave Mode ............................................................................................................................................. 72
3.18.1.3 Transmit Multiplexed Mode .............................................................................................................................................. 73
3.18.1.4 Offset ................................................................................................................................................................................ 73
3.18.2.1 Transmit Clock Master Mode ............................................................................................................................................ 76
3.18.2.2 Transmit Clock Slave Mode ............................................................................................................................................. 76
3.18.2.3 Transmit Multiplexed Mode .............................................................................................................................................. 76
3.8.2.3.3
3.8.2.3.4
3.8.2.3.5
3.8.2.3.6
3.8.2.3.7
V5.2 Link .......................................................................................................................................................................... 46
Interrupt Summary ............................................................................................................................................................ 46
3.17.1.1.1 Receive Clock Master Full T1/J1 Mode ......................................................................................................... 64
3.17.1.1.2 Receive Clock Master Fractional T1/J1 Mode ............................................................................................... 64
3.17.2.1.1 Receive Clock Master Full E1 Mode ............................................................................................................. 69
3.17.2.1.2 Receive Clock Master Fractional E1 Mode ................................................................................................... 69
3.18.1.1.1 Transmit Clock Master Full T1/J1 Mode ........................................................................................................ 71
3.18.1.1.2 Transmit Clock Master Fractional T1/J1 Mode .............................................................................................. 71
3.18.2.1.1 Transmit Clock Master Full E1 Mode ............................................................................................................ 76
3.18.2.1.2 Transmit Clock Master Fractional E1 Mode .................................................................................................. 76
National Bit Extraction ................................................................................................................................... 45
National Bit Codeword Extraction .................................................................................................................. 45
Extra Bit Extraction ........................................................................................................................................ 45
Remote Signaling Multi-Frame Alarm Indication Bit Extraction ..................................................................... 45
Sa6 Code Detection Per ETS 300 233 .......................................................................................................... 45
4
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
August 20, 2009

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