RG82845 S L5YQ Intel, RG82845 S L5YQ Datasheet - Page 24

• Manufacturer Part Number: RG82845 S L5YQ
• Manufacturer: Intel

Specifications of RG82845 S L5YQ

• Lead Free Status / RoHS Status: Not Compliant

Signal Description
2.4
2.4.1
24
AGP Interface Signals
AGP Addressing Signals
NOTE: The above table contains two mechanisms to queue requests by the AGP master. Note that the
PIPE#
SBA[7:0]
Signal Name
master can only use one mechanism. The master may not switch methods without a full reset of the
system. When PIPE# is used to queue addresses the master is not allowed to queue addresses using
the SBA bus. For example, during configuration time, if the master indicates that it can use either
mechanism, the configuration software will indicate which mechanism the master will use. Once this
choice has been made, the master will continue to use the mechanism selected until the master is
reset (and reprogrammed) to use the other mode. This change of modes is not a dynamic mechanism
but rather a static decision when the device is first being configured after reset.
Type
AGP
AGP
I
I
Pipelined Read: This signal is asserted by the AGP master to indicate a
full-width address is to be enqueued on by the target using the AD bus.
One address is placed in the AGP request queue on each rising clock
edge while PIPE# is asserted. When PIPE# is deasserted, no new
requests are queued across the AD bus.
During SBA Operation: Not Used.
During FRAME# Operation: Not Used.
PIPE# is a sustained three-state signal from masters (graphics
controller), and is an MCH input.
Note: Initial AGP designs may not use PIPE# (i.e., PCI only 66 MHz).
Sideband Address: These signals are used by the AGP master
(graphics controller) to place addresses into the AGP request queue.
The SBA bus and AD bus operate independently. That is, a transaction
can proceed on the SBA bus and the AD bus simultaneously.
During PIPE# Operation: Not Used.
During FRAME# Operation: Not Used.
Note: When sideband addressing is disabled, these signals are
Therefore, an 8 k
required on the motherboard.
isolated (no external/internal pull-up resistors are required).
pull-up resistor connected to this pin is
Intel
Description
®
82845 MCH for SDR Datasheet
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