RG82845 S L5YQ Intel, RG82845 S L5YQ Datasheet - Page 3
RG82845 S L5YQ
Manufacturer Part Number
RG82845 S L5YQ
Description
Manufacturer
Intel
Datasheet
1.RG82845_S_L5YQ.pdf
(148 pages)
Specifications of RG82845 S L5YQ
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Contents
1
2
3
Intel
®
82845 MCH for SDR Datasheet
R
Introduction ........................................................................................................................11
1.1
1.2
1.3
1.4
Signal Description..............................................................................................................19
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Register Description ..........................................................................................................31
3.1
3.2
3.3
3.4
Terminology and Notations ...................................................................................11
Reference Documents ..........................................................................................13
Intel
Intel
System Bus Signals ..............................................................................................21
SDR SDRAM Interface Signals.............................................................................23
Hub Interface Signals............................................................................................23
AGP Interface Signals...........................................................................................24
Clocks, Reset, and Miscellaneous Signals ...........................................................28
Voltage Reference and Power Signals .................................................................29
Reset States During Reset ...................................................................................30
Register Terminology............................................................................................31
PCI Bus Configuration Space Access...................................................................32
I/O Mapped Registers ...........................................................................................34
Memory-Mapped Register Space .........................................................................36
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
3.2.1
3.2.2
3.3.1
3.3.2
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
3.4.6
®
®
845 Chipset System Architecture ................................................................14
82845 MCH Overview .................................................................................14
System Bus Interface ............................................................................15
System Bus Error Checking ..................................................................15
System Memory Interface .....................................................................16
AGP Interface........................................................................................16
Hub Interface.........................................................................................17
Intel
System Interrupts ..................................................................................18
Powerdown Flow ...................................................................................18
AGP Addressing Signals .......................................................................24
AGP Flow Control Signals .....................................................................25
AGP Status Signals ...............................................................................25
AGP Strobes Signals.............................................................................26
AGP/PCI Signals ...................................................................................26
Standard PCI Bus Configuration Mechanism........................................33
Routing Configuration Accesses ...........................................................33
CONF_ADDR—Configuration Address Register ..................................34
CONF_DATA—Configuration Data Register.........................................36
DRAMWIDTH—DRAM Width Register.................................................37
DQCMDSTR—Strength Control Register (SDQ and CMD
Signal Groups) ......................................................................................38
CKESTR—Strength Control Register (SCKE Signal Group) ................39
CSBSTR—Strength Control Register (SCS# Signal Group).................40
CKSTR—Strength Control Register (Clock Signal Group) ...................41
RCVENSTR—Strength Control Register (RCVENOUT
Signal Group) ........................................................................................42
®
MCH Clocking ..............................................................................17
3
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