RG82845 S L5YQ Intel, RG82845 S L5YQ Datasheet - Page 25

• Manufacturer Part Number: RG82845 S L5YQ
• Manufacturer: Intel

Specifications of RG82845 S L5YQ

• Lead Free Status / RoHS Status: Not Compliant

2.4.2
2.4.3
Intel
®
82845 MCH for SDR Datasheet
R
AGP Flow Control Signals
AGP Status Signals
RBF#
WBF#
ST[2:0]
Signal Name
Signal Name
Type
Type
AGP
AGP
AGP
O
I
I
Read Buffer Full: RBF# indicates if the master is ready to accept
previously requested low priority read data. When RBF# is asserted, the
MCH is not allowed to initiate the return low priority read data. That is, the
MCH can finish returning the data for the request currently being
serviced. RBF# is only sampled at the beginning of a cycle. If the AGP
master is always ready to accept return read data, then it is not required
to implement this signal.
During FRAME# Operation: Not Used.
Write-Buffer Full: Indicates if the master is ready to accept fast write
data from the MCH. When WBF# is asserted, the MCH is not allowed to
drive fast write data to the AGP master. WBF# is only sampled at the
beginning of a cycle. If the AGP master is always ready to accept fast
write data, then it is not required to implement this signal.
During FRAME# Operation: Not Used.
Status: ST[2:0] provides information from the arbiter to an AGP Master
on what it may do. ST[2:0] only have meaning to the master when its
G_GNT# is asserted. When G_GNT# is deasserted, these signals have
no meaning and must be ignored. Refer to the AGP Interface
Specification, Revision 2.0 for further explanation of the ST[2:0] values
and their meanings.
During FRAME# Operation: These signals are not used during
FRAME#-based operation, except that a ‘111’ indicates that the master
may begin a FRAME# transaction.
Description
Description
Signal Description
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