PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 108

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PEF20550HV2.1XT

Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF20550HV2.1XT

Lead Free Status / Rohs Status
Compliant
Example
In CFI-mode 0 all four CFI-ports shall be initialized as IOM-2 ports with a 4-bit C/I-field
and D-channel handling by the SACCO-A.
CFI time slots 0, 1, 4, 5, 8, 9
initialized.
CFI time slots 2, 3, 6, 7, 10, 11,
need to be initialized:
CFI-port 0, time slot 2 (even), downstream
CFI-port 0, time slot 3 (odd), downstream
CFI-port 0, time slot 2 (even), upstream
CFI-port 0, time slot 3 (odd), upstream
Repeat the above programming steps for the remaining CFI-ports and time slots.
This procedure can be speeded up by selecting the CM-initialization mode
(OMDR:OMS1..0 = 10). If this selection is made, the access time to a single memory
location is reduced to 2.5 RCL-cycles. The complete initialization time for 32 IOM-2
channels is then reduced to 128
Semiconductor Group
MADR =
MAAR =
MACR =
Wait for STAR:MAC = 0
MADR =
MAAR =
MACR =
Wait for STAR:MAC = 0
MADR =
MAAR =
MACR =
Wait for STAR:MAC = 0
MADR =
MAAR =
MACR =
Wait for STAR:MAC = 0
08
09
88
89
FF
7A
FF
7B
FF
78
FF
70
H
H
H
H
H
H
H
H
H
H
H
H
; the C/I-value ’1111’ will be transmitted upon CFI-activation
; addresses ts 2 down
; CM-code ’1010’
; don’t care
; addresses ts 3 down
; CM-code '1011'
; the C/I-value '1111' is expected upon CFI-activation
; address ts 2 up
; CM-code '1000'
; don’t care
; address ts 3 up
; CM-code '0000'
28, 29 of each port are B-channels and need not to be
0.61 s = 78 s
30, 31 of each port are pre-processed channels and
108
Operational Description
PEB 20550
PEF 20550
01.96

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