PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 251

• Manufacturer Part Number: PEF20550HV2.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF20550HV2.1XT

• Lead Free Status / Rohs Status: Compliant

W:MACR
wait for STAR:MAC = 0
R:MADR
5.3.3.3 Access to the Control Memory Data Field
Writing to or reading the control memory (CM) data field may serve different purposes
depending on the function given to the corresponding CFI timeslot which is defined by
the 4 bit code field value:
There are two types of commands which give access to the CM data field:
The memory operation code MACR:MOC = 111X is used for writing to the CM data field
and code field simultaneously. The MADR content is transferred to the data field while
the MACR:CMC3 … 0 bits are transferred to the code field. This command is explained
in more detail in chapter 5.3.3.4.
The memory operation code MACR:MOC = 1001 is used for reading or writing to the CM
data field. Since the CM code field is not affected, this command makes only sense if the
related CFI timeslot has already the desired functionality.
The Procedure for Writing to the CM Data Field (using the MOC = 1001 command)
is
W:MADR
W:MADR
R:MADR
For test purposes this setting shall be read back:
W:MAAR
Table 39
CFI Timeslot Applications
CFI Timeslot Application
Switched channel
Preprocessed channel
The Procedure for Reading the CM Data Field is
W:MAAR
W:MACR
wait for STAR:MAC = 0
R:MADR
Semiconductor Group
P channel
= 1010 1010
= 1110 0000
= XXXX 1001
= value
= CFI timeslot address according figure 84
= 0100 1000
= CFI timeslot address according figure 84
= 1100 1000
= value
B
B
B
B
B
= E0
= 48
= C8
; address of upstream PCM port 1, timeslot 10
; read back of MD3 … 0
according to figure 84
H
H
H
; read access with MOC = 1100
251
Meaning of CM Data Field
Pointer to PCM interface
C/I or SIG value
CFI idle code
Application Hints
PEB 20550
PEF 20550
01.96