PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 3

• Manufacturer Part Number: PEF20550HV2.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF20550HV2.1XT

• Lead Free Status / Rohs Status: Compliant

PEB 20550
PEF 20550
Revision History:
Previous Release:
Page (in
Previous
Release)
29
29
31
51
53
55
58
65
82
85
93
101
104
114
121
124
128
132
140
142
148
Page
(in User’s
Manual)
13
38
46
46
49
57
60
76
80
82
85
95
101
114
118
129
130
140
144
154
162
167
172
177
185
187
191
380
395
396
EXIR: XMR description (extended)
Package outlines (new)
Appendix (new)
Subjects (major changes since last revision)
PEF 20550 (ext. temperature range; new)
System Integration and Application (DECT added)
Boundary scan number 22 = 110 (correction)
Boundary scan number 9: ID code for V1.3 added
Boundary scan ID code for V1.3 added
DMA-transfers, figure 31 (new)
Support of the HDLC protocol by SACCO, figure 35 (new)
SACCO clock mode 2 description (extended)
Extensions for V1.3
Arbiter state machine description (extended)
Table 14: Control channel delay examples (extended)
Internal reference clock RCL replaced by CFI reference clock CRCL
Interrupt driven transmission sequence example, figure 50 (new)
Internal reference clock RCL replaced by CFI reference clock CRCL
Register address arrangement (extended)
EMOD: ECMD2 restriction 5 (new)
PMOD: PMD1..0 description (data rate stepping corrected)
CMD2: CXF, CRR description (corrected)
MACR description (extended)
TIMR: SSR (correction)
VNSR: VN3..0 = V1.2 (correction)
CCR1: ODS description (extended for V1.3)
SACCO RSTA: C/R description (new)
VSTR: VN3..0 value for V1.3 added
SCV: SCV7...0 description (extended)
Application Hints (new)
t
ALS min
Technical Manual 9.93
User’s Manual 01.96
= 8 ns,
t
DRH max
= 65 ns,
t
AH min
= 0 ns (correction)