PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 402

• Manufacturer Part Number: PEF20550HV2.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF20550HV2.1XT

• Lead Free Status / Rohs Status: Compliant

9.2.3
Figure 147
Switching of CFI Time Slots to the PCM Interface (working sheet)
Semiconductor Group
MAAR
MAAR
CSCR
MAAR
MAAR
MAAR
MAAR
MAAR
MADR
MAAR
Enable/Tristate PCM Output TS:
Writing/Reading back PCM Idle Codes and reading switched CFI Data:
Reading a CFI TS by the mP (no connection to PCM):
CFI + PCM Mode 0
Switching of CFI Time Slots to the PCM Interface (data upstream)
CFI Port, TS
CFI Port, TS
PCM Port, TS
CFI Port, TS
PCM Port, TS
CFI Port, TS
CFI Port, TS
Switching of 8 BIt Channels:
Switching of Subchannels:
X
1 .
1
1
1 .
1
1 .
1
.
3
CFI Bit Position
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
CFI TS
2
.
.
.
.
.
.
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.
TS
1
Port
ELIC,
.
.
.
.
.
.
.
.
.
Loop
0
0 1
1 0
1 1
.
.
.
.
.
.
.
.
.
R
0
EPIC
0
.
.
.
.
.
.
.
.
.
1
0
= 7 ... 4 or 7, 6 (default for D channel)
=
=
=
CFI Port
MADR
MAAR
R
3 ... 0 or 5, 4
7 ... 4 or 3, 2
3 ... 0 or 1, 0
Direct
MADR
MADR
MADR
0 = Tristate
1 = Driver enabled
MADR
MADR
MADR
PCM Mode 1
X .
µP Access
Select Bit Position
Value or Idle Code
TS Value (R)
PCM Port, TS
1 = Read CFI Value
0 = Write Idle Code
1 1 1 1
1
.
.
.
.
=
PCM Port, TS
PCM Port, TS
.
.
.
.
.
Read Back Idle Code
.
Data Memory
.
.
.
.
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.
TS
7, 6
Port
.
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.
4, 5
.
.
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.
.
.
3, 2
402
.
.
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.
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.
.
Loop
1, 0
.
.
.
.
.
.
CFI Mode 1
X
.
Enable/
Disable
MACR
MACR
MACR
MACR
MACR
MACR
MACR
.
.
Switching Command
Switching Command
Command
Disable Switching Connection
Read/Write Data Memory
Select
Read Value to CM Data
0 1 1 1 0 0 0 1
0
0
0 1 1 1
0 1 1 1
1
.
.
TS
0
0 0 1 1 =
0
0
0
0
0
1
1
1
1 0
.
.
PCM TS
.
.
.
.
.
For MADR/MAAR setings see loewr box
For MADR/MAAR setings see loewr box
For MAAR setings see lower box
For MAAR setings see lower box
P µ
0
0
Port
1
1
1
1
1
1
1
.
.
.
Access
0
0
0
0 1 =
0
0
1
1
1
1
.
.
.
0
0 0 1 0 =
0 1
0 1
0 1
0 1
0
1
0
1
0
0
1
1
.
.
0 = One TS
1 = All TS
.
=
MADR
MAAR
=
=
=
=
=
0
0
0 0 0
0
0 0
0
.
7 ... 0
7 ... 4
3 ... 0
7, 6
5, 4
3, 2
1, 0
CFI + PCM Mode 2
0
0 0 =
0
0
0
1
1 1 = 7, 6
1 0 =
.
X .
0
0
0
1
1
1
.
=
=
Desired
TS Width
and Bit
Position
7 ... 4
3 ... 0
5, 4
3, 2
1, 0
.
Neccessary only
for writing idle
codes,
connection to
PCM TS already
exists!
.
TS
Switched
TS Width
and PCM
Bit Position
.
if a
.
PEB 20550
PEF 20550
.
ITD08111
Appendix
.
01.96