PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 167

• Manufacturer Part Number: PEF20550HV2.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF20550HV2.1XT

• Lead Free Status / Rohs Status: Compliant

XMR
XDU/EXE Transmission Data Underrun/Extended transmission End.
Note: It is not possible to transmit frames when a XMR- or XDU-interrupt is indicated.
EHC
RFO
RFS
Semiconductor Group
Transmit Message Repeat.
The transmission of a frame has to be repeated because:
– A frame consisting of more then 32 bytes is polled a second time in auto-
– Collision has occurred after sending the 32nd data byte of a message in a
– CTS (transmission enable) has been withdrawn after sending the 32nd
The actual frame has been aborted with IDLE, because the XFIFO holds no
further data, but the frame is not yet complete according to registers XBCH/
XBCL.
In extended transparent mode, this bit indicates the transmission end
condition.
Extended HDLC-frame.
The SACCO has received a frame in auto-mode which is neither a RR- nor
an I-frame. The control byte is stored temporarily in the RHCR-register but
not in the RFIFO.
Receive Frame Overflow.
A frame could not be stored due to the occupied RFIFO (i.e. whole frame has
been lost). This interrupt can be used for statistical purposes and indicates,
that the CPU does not respond quickly enough to an incoming RPF- or RME-
interrupt.
Receive Frame Start.
This is an early receiver interrupt activated after the start of a valid frame has
been detected, i.e. after a valid address check in operation modes providing
address recognition, otherwise after the opening flag (transparent mode 0),
delayed by two bytes.
After a RFS-interrupt the contents of
• RHCR
• RAL1
• RSTA bit3-0
are valid and can by read by the CPU.
The RFS-interrupt is maskable by programming bit CCR2:RIE.
mode.
bus configuration.
data byte of a message in point-to-point configuration.
167
Detailed Register Description
PEB 20550
PEF 20550
01.96