HI-6121PQMF HOLTIC [Holt Integrated Circuits], HI-6121PQMF Datasheet - Page 100

• Manufacturer Part Number: HI-6121PQMF
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

RT MESSAGE RESPONSES, OPTIONS & EXCEPTIONS, Cont.
Circumstances for
Received Message
Mode code command
with mode code 10100
and T/ bit equals 0
Invalid command word.
——— OR ———
T/ bit equals 1 and
UMCINV bit in Config.
Register 1 equals 1 ***
——— AND ———
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 0 *
MC20 continues on next page
MC20 EXCEPTIONS:
TRANSMITTER
T/ bit equals 1
R
SHUTDOWN
SELECTED
R
(MC20)
R
Terminal Response
to Received Command
Default response: Reset
Message Error (ME)
status. and transmit
Status Word. If broadcast,
set BCR status bit and
suppress Status response.
This command is intended
for use in 1553 systems
with more than one dual
redundant bus.
After Status Word transmission, the device stores received data word in the assigned
index or ping-pong buffer (or in Descriptor Word 4 if SMCP Simplified Mode Command
Processing applies).
If the MCOPT4 bit in Configuration Register 2 equals 0, the received data word is compared
to the value in the Bus Select Register corresponding to the inactive bus. For example, if the
command is received on Bus A, the comparison uses the Bus B Select Register value. If the
compared values match, the device automatically shuts down either
transmit only
Register 2. (See description of SDSEL and MCOPT4 bits in Configuration Register 2 for further
information. When a bus transmitter (or transmitter and receiver) is shut down by this mode
command, bus status is reflected by assertion of a TXASD or TXBSD bit in the Built-In Test
Register at register address 0x0014. If SDSEL equals logic 0, an RXASD or RXBSD bit will
also be asserted. See Built-In Test Register description for further information.
If MCOPT4 bit in Configuration Register 2 equals 1, the IWA interrupt is typically used to alert
the host when an MC20 command is received.
mode data word matches the bus selection criteria. If bus selection criteria is met,
fulfills bus shutdown command using one of two options:
(1) set the bus shutdown bit INHBUSA or INHBUSB for the inactive bus in
(2) assert the transmit shutdown input pin TXINHA or TXINHB for the inactive bus
Once shutdown, the inactive bus transmitter (or transmitter and receiver) can only be
reactivated by an “Override Transmitter Shutdown” MC5 or MC21 or “Reset Remote Terminal” MC8
mode code command, or by software reset (by setting the SRST bit in Configuration Register 1)
or by hardware reset initiated by asserting the
No terminal response,
the message is ignored.
No Status Word change.
(mode code is undefined
when T/ bit equals 0)
Respond “In form”: Reset
Message Error (ME) status.
If not broadcast, transmit
Status Word. If broadcast,
set the BCR status bit and
suppress status response.
Configuration Register 1
to inhibit only transmit.
commands are heeded without transmit.
R
FOR THE HI-6120 / HI-6121 REMOTE TERMINAL
for the inactive bus, depending on the state of the SDSEL bit in Configuration
SUMMARY OF MESSAGE RESPONSES
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
to inhibit both transmit and receive,
The inactive bus receiver is still active and all valid
or
100
Bits Updated
in Descriptor
Control Word
DBAC bit reset.
BCAST bit reset.
DPB bit toggles.
No change.
DBAC bit set.
BCAST bit updated.
DPB bit toggles.
This option is rarely applied.
MR
The host
master reset input pin.
must evaluate whether the received
transmit and receive
Bits Updated
in Data Buffer
Msg Info Word
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
No Message Info
Word is written
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
the host
or
Interrupt
Options
None
IWA
IWA
IBR