HI-6121PQMF HOLTIC [Holt Integrated Circuits], HI-6121PQMF Datasheet - Page 94

• Manufacturer Part Number: HI-6121PQMF
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

RT MESSAGE RESPONSES, OPTIONS & EXCEPTIONS, Cont.
Circumstances for
Received Message
Mode code command
with mode code 01000
and T/ bit equals 1
MC8 EXCEPTIONS:
Invalid command word.
——— OR ———
T/ bit equals 0 and
UMCINV bit in Config.
Register 1 equals 1 ***
——— AND ———
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 0 *
——— AND ———
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 1 **
Mode code command
word is followed by a
contiguous data word
* Command is illegal but terminal is not using “illegal command detection” (in form response).
** Command is illegal and terminal is using “illegal command detection”
*** Undefined mode command rendered invalid by UMCINV option bit. Command’s bit in Illegalization Table is “don’t care”.
T/ bit equals 0
T/ bit equals 0
R
TERMINAL
R
R
REMOTE
RESET
(MC8)
R
Terminal Response
to Received Command
Default response: Reset
Message Error (ME)
status. If not broadcast,
transmit Status Word.
After Status transmission, the device automatically resets the status Message Error (ME)
Busy and Broadcast Command received (BCR) bits in its internal status register. The BIT Word
at shared RAM address is reset to 0x0000. If either transmitter was shutdown, the shutdown
condition is overridden. If the Terminal Flag (TF) status bit was inhibited, the inhibit is reset.
This command does not reset any of the host-programmed registers that configure the
terminal for operation. To complete the terminal reset process, the host must assert either
MR
in Configuration Register 1 to execute software reset. See following section entitled
Reset and Initialization for additional details. Because MC8 requires host interaction,
most applications will probably utilize the IWA interrupt to alert the host when received.
No terminal response,
the message is ignored.
No Status Word change.
(mode code is undefined
when T/ bit equals 0)
Respond “In form”: Reset
Message Error (ME) status.
If not broadcast, transmit
Status Word. If broadcast,
set the BCR status bit and
suppress status response.
Set Message Error (ME)
status. If not broadcast,
transmit Status Word.
If broadcast, also set
Status Word BCR bit and
suppress Status response.
No Status Word transmit.
Set the Message Error
(ME) status bit.
hardware master reset (with or without auto-initialization) or assert the SRST bit
R
FOR THE HI-6120 / HI-6121 REMOTE TERMINAL
SUMMARY OF MESSAGE RESPONSES
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
94
Bits Updated
in Descriptor
Control Word
DBAC bit reset.
BCAST bit updated.
DPB bit toggles.
No change.
DBAC bit set.
BCAST bit updated.
DPB bit toggles.
DBAC bit set.
BCAST bit updated.
DPB bit toggles.
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
Bits Updated
in Data Buffer
Msg Info Word
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
No Message Info
Word is written
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
ILCMD bit set.
MERR bit set.
BUSID bit updated.
RTRT bit reset.
(Other error bits reset.)
MERR bit set.
GAPERR bit set.
BUSID bit updated.
ILCMD bit reset.
BCAST bit reset.
Interrupt
Options
ILCMD
MERR
None
IWA
IWA
IWA
IWA
IBR
IBR
IBR