HI-6121PQMF HOLTIC [Holt Integrated Circuits], HI-6121PQMF Datasheet - Page 63

• Manufacturer Part Number: HI-6121PQMF
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

CIRCULAR BUFFER MODE 2, Cont.
messages resulting in error. With TRXDB asserted, the
host is not bothered by message retries caused by errors.
The Buffer Empty/Full interrupt (if enabled) is generated
only upon successful transaction of the entire N-message
data block.
To initialize Circular Buffer Mode 2, the host must know the
number of messages to be transacted, always a power of
two: 1, 2, 4, 8, 16, 32, 64, 128, 256 or 512 messages. The
host writes descriptor Control Word bits 7:4 with an
encoded 4-bit value to set the fixed number of messages to
be transacted. See Table 1. The host initializes the
descriptor block MIBA pointer with a Message Information
Buffer starting address. Because the MIB stores two words
for each message, the allocated MIB space should equal
2x the number of messages.
Segregated storage for data and message information simplifies host loading / offloading of buffered data.
Descriptor MIB Address tracks number of messages. Full count occurs when N initialized 0-bits become N 1-bits.
When full number of messages in block is transacted, an optional interrupt is generated to notify host.
Message Info Buffer
Message Info Word
Message Info Word
Message Info Word
Time-Tag Word
Time-Tag Word
Time-Tag Word
Subaddress
Assigned
(MIB)
Last Message
First Message
in Data Block
in Data Block
Message
Current
Memory Address for the Applicable
Subaddress Block is Derived From
Figure 17. Illustration of Circular Buffer Mode 2
the Decoded Command Word
HOLT INTEGRATED CIRCUITS
Descriptor Block
HI-6120, HI-6121
for Subaddress
Current Address
Start Address
Control Word
MIB Address
Increasing
Memory
Address
63
The initially-loaded MIB base address value is restricted.
Some lower bits of the starting address must be zero so the
device can restore the MIBA pointer to the initial MIB base
address after the predetermined message count is
transacted. The required number of logic-0 bits depends
on the message count. See Table 1. Initializing the MIBA
base address with more trailing zeros than indicated is
acceptable; initializing less trailing zeros will cause
malfunction.
Allocated space in the data buffer (column 3 in Table 1)
assumes each message has the maximum 32 data words.
If messages contain less than 32 words, the data buffer
size can be reduced. Since Circular Buffer Mode 2 counts
messages, values in all remaining Table 1 columns remain
valid when message word count is reduced.
First Message
Last Message
in Data Block
in Data Block
Message
Current
Data Word(s)
Data Word(s)
Data Word(s)
Data Word N
Data Word N
Data Word N
Subaddress
Data Word 1
Data Word 1
Data Word 1
Data Buffer
Assigned
Circular
Current
Address
Start
Address