HI-6121PQMF HOLTIC [Holt Integrated Circuits], HI-6121PQMF Datasheet - Page 22

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HI-6121PQMF

Manufacturer Part Number
HI-6121PQMF
Description
MIL-STD-1553 Remote Terminal ICs
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
REGISTERS, Cont.
TIME-TAG UTILITY REGISTER
This 16-bit register is Read-Write and is fully maintained by the host.
affected by SRST software reset.
Function 1: When Configuration Register 2 is written causing a 0 to 1 transition of the TTLOAD bit, the value contained in the
Time-Tag Utility register is loaded into the Time-Tag counter.
Function 2: If the TTINT1 bit in Configuration Register 2 and the
Interrupt Pending register TTINT1 bit is set and the
counter value matches the value stored in the Time-Tag Utility register
BUS A SELECT REGISTER
This 16-bit register is Read-Write and is fully maintained by the host. This register is cleared after
affected by SRST software reset. The Bus A Select register is only used when the MCOPT4 bit in Configuration Register 2
equals 0. This MCOPT4 setting means the device automatically fulfills mode commands MC20 (decimal) “selected transmitter
shutdown” or MC21 “override selected transmitter shutdown”.
B, the inactive bus is Bus A. The device compares the received mode data word to the contents of the Bus A Select register to
determine whether inactive Bus A is selected for “transmitter shutdown” or “transmitter shutdown override”. (Bus shutdown or
shutdown override can only occur for the inactive bus.) If the data word matches the value stored in the Bus A Select register
and MCOPT4 equals 0, the device automatically fulfills MC20 “transmitter shutdown” or MC21 “shutdown override” without
host assistance: If the mode command received was MC20, the Transmit Shutdown A bit in the built-in test (BIT) word is
asserted. If mode command MC21 was received, the Transmit Shutdown A bit in the BIT Word is negated. Refer to
Configuration Register 2 description of MCOPT4 bit for additional details.
BUS B SELECT REGISTER
This 16-bit register is Read-Write and is fully maintained by the host.This register is cleared after
affected by SRST software reset. The Bus B Select register is only used when the MCOPT4 bit in Configuration Register 2
equals 0. This MCOPT4 setting means the device automatically fulfills mode commands MC20 (decimal) “selected transmitter
shutdown” or MC21 “override selected transmitter shutdown”.
the inactive bus is Bus B. The device compares the received mode data word to the contents of the Bus B Select register to
determine whether inactive Bus B is selected for “transmitter shutdown” or “transmitter shutdown override”. If the data word
matches the value stored in the Bus B Select register and MCOPT4 equals 0, the device automatically fulfills MC20 “transmit
shutdown” or MC21 “shutdown override” without host assistance: If the mode command received was MC20, the Transmit
Shutdown B bit in the built-in test (BIT) word is asserted. If mode command MC21 was received, the Transmit Shutdown B bit in
the BIT Word is negated. Refer to Configuration Register 2 description of MCOPT4 bit for additional details.
“Transmitter shutdown” or “shutdown override” can only occur for the inactive bus. If either mode command is received on Bus
“Transmit shutdown” or “shutdown override” can only occur for the inactive bus. If either mode command is received on Bus A,
MSB
MSB
MSB
15 14 13 12 11 10 9
15 14 13 12 11 10 9
15 14 13 12 11 10 9
15 14 13 12 11 10 9
15 14 13 12 11 10 9
15 14 13 12 11 10 9
BUS B SELECT REGISTER 15:0
BUS A SELECT REGISTER 15:0
TIME-TAG UTILITY 15:0
8
8
8
8
8
8
7
7
7
7
7
7
This register has two functions associated with the free-running Time-Tag counter:
(0x0012)
(0x0013)
6
6
6
6
6
6
5
5
5
5
5
5
(0x0011)
4
4
4
4
4
4
HOLT INTEGRATED CIRCUITS
3
3
3
3
3
3
2
2
2
2
2
2
HI-6120, HI-6121
INTHW
1
1
1
1
1
1
0
0
0
0
0
0
LSB
LSB
LSB
interrupt output is asserted each time the free-running Time-Tag
22
TTINT1 bit in the Interrupt Enable register are both set the
This register is cleared after
.
MR
MR
MR
pin master reset, but is not
pin master reset, but is not
pin master reset, but is not
,

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