HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 311

• Manufacturer Part Number: HD6417708SF60V
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

I/O Card Interface Timing: Figures 10.47 and 10.48 show the timing for the PCMCIA I/O card
interface.
The I/O card interface is supported only for physical space area 6. Switching between the I/O card
interface and the IC memory card interface is performed according to the accessed address. When
PCMCIA is designated for physical space area 6, the bus access is automatically performed as an
I/O card interface access when a physical address from H'1A000000 to H'1BFFFFFF is accessed.
When accessing a PCMCIA I/O card, the access should be performed using a noncacheable area in
virtual space (P2 or P3 space) or an area specified as noncacheable by the MMU.
When an I/O card interface access is made to a PCMCIA card in little-endian mode, dynamic
sizing of the I/O bus width is possible using the IOIS16 pin. When a 16-bit bus width is set for
area 6, if the IOIS16 signal is high during a word-size I/O bus cycle, the I/O port is recognized as
being 8 bits in width. In this case, a data access for only 8 bits is performed in the I/O bus cycle
being executed, followed automatically by a data access for the remaining 8 bits.
Figure 10.49 shows the basic timing for dynamic bus sizing.
In big-endian mode, the IOIS16 signal is not supported.
In big-endian mode, the IOIS16 signal should be fixed low.
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