HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 610

• Manufacturer Part Number: HD6417708SF60V
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

Table A.12 Pin States (Pseudo-SRAM/Big-Endian) (cont)
Pin
CS6 to CS0
RD
RD/WR
BS
RAS/CE
CAS/CASLL/OE
CASLH
CASHL/CAS2L
CASHH/CAS2H
DQMLL/WE0
DQMLU/WE1
DQMUL/WE2/ICIORD
DQMUU/WE3/ICIOWR R
MD3/CE2A
MD4/CE2B
MD5/RAS2
CKE
WAIT
IOIS16
A25 to A0
D7 to D0
590
R
W
R
W
R
W
R
W
R
W
W
Byte
Access
(Address
4n)
Enabled
High
High
High
Low
Enabled
Low
Low
High
High
High
High
High
High
High
High
High
High
Low
High-Z or
high
High-Z or
high
High-Z
Disabled
Disabled
Disabled
Address
Invalid
data
*1
*2
Byte
Access
(Address
4n + 1)
Enabled
High
High
High
Low
Enabled
Low
Low
High
High
High
High
High
High
High
High
Low
High
High
High-Z or
high
High-Z or
high
High-Z
Disabled
Disabled
Disabled
Address
Invalid
data
*1
*2
Byte
Access
(Address
4n + 2)
Enabled
High
High
High
Low
Enabled
Low
Low
High
High
High
High
High
High
Low
High
High
High
High
High-Z or
high
High-Z or
high
High-Z
Disabled
Disabled
Disabled
Address
Invalid
data
*1
*2
32-Bit Bus Width
Byte
Access
(Address
4n + 3)
Enabled
High
High
High
Low
Enabled
Low
Low
High
High
High
High
Low
High
High
High
High
High
High
High-Z or
high
High-Z or
high
High-Z
Disabled
Disabled
Disabled
Address
Valid
data
*1
*2
Word
Access
(Address
4n)
Enabled
High
High
High
Low
Enabled
Low
Low
High
High
High
High
High
High
High
High
Low
High
Low
High-Z or
high
High-Z or
high
High-Z
Disabled
Disabled
Disabled
Address
Invalid
data
*1
*2
Word
Access
(Address
4n + 2)
Enabled
High
High
High
Low
Enabled
Low
Low
High
High
High
High
Low
High
Low
High
High
High
High
High-Z or
high
High-Z or
high
High-Z
Disabled
Disabled
Disabled
Address
Valid
data
*1
*2
Longword
Access
Enabled
High
High
High
Low
Enabled
Low
Low
High
High
High
High
Low
High
Low
High
Low
High
Low
High-Z or
high
High-Z or
high
High-Z
Disabled
Disabled
Disabled
Address
Valid
data
*1
*2