HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 388

• Manufacturer Part Number: HD6417708SF60V
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

Transmitting and Receiving Data (SCI Initialization (Asynchronous Mode)): Before
transmitting or receiving, clear the TE and RE bits to 0 in the serial control register (SCSCR), then
initialize the SCI as follows.
When changing the operation mode or communication format, always clear the TE and RE bits to
0 before following the procedure given below. Clearing TE to 0 sets TDRE to 1 and initializes the
transmit shift register (SCTSR). Clearing RE to 0, however, does not initialize the RDRF, PER,
FER, and ORER flags or receive data register (SCRDR), which retain their previous contents.
When an external clock is used, the clock should not be stopped during initialization or subsequent
operation. SCI operation becomes unreliable if the clock is stopped.
Figure 13.4 is a sample flowchart for initializing the SCI. The procedure for initializing the SCI is:
1. Select the clock source in the serial control register (SCSCR). Leave RIE, TIE, TEIE, MPIE,
2. Select the communication format in the serial mode register (SCSMR).
3. Write the value corresponding to the bit rate in the bit rate register (SCBRR) unless an external
4. Wait for at least the interval required to transmit or receive one bit, then set TE or RE in the
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TE, and RE cleared to 0. If clock output is selected in asynchronous mode, clock output starts
immediately after the setting is made in SCSCR.
clock is used.
serial control register (SCSCR) to 1. Also set RIE, TIE, TEIE, and MPIE as necessary. Setting
TE or RE enables the SCI to use the TxD or RxD pin. The initial states are the mark transmit
state, and the idle receive state (waiting for a start bit).
Figure 13.3 Output Clock and Serial Data Timing (Asynchronous Mode)
0
D0
D1
D2
D3
1 frame
D4
D5
D6
D7
0/1
1
1