HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 43

• Manufacturer Part Number: HD6417708SF60V
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

Table 2.2
Addressing
Mode
Register
indirect with
displacement
Indexed
register indirect
GBR indirect
with
displacement
Indexed GBR
indirect
Addressing Modes and Effective Addresses (cont)
Instruction
Format
@(disp:4,
Rn)
@(R0, Rn) Effective address is sum of register Rn and
@(disp:8,
GBR)
@(R0,
GBR)
Effective Address Calculation Method
Effective address is register Rn contents with
4-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the
operand size.
R0 contents.
Effective address is register GBR contents
with 8-bit displacement disp added. After
disp is zero-extended, it is multiplied by 1
(byte), 2 (word), or 4 (longword), according to
the operand size.
Effective address is sum of register GBR and
R0 contents.
(zero-extended)
(zero-extended)
GBR
1/2/4
1/2/4
disp
GBR
disp
Rn
R0
R0
Rn
+
+
+
+
+ disp
+ disp
GBR + R0
Rn + R0
GBR
Rn
1/2/4
1/2/4
Calculation Formula
Byte: Rn + disp
Word: Rn + disp
Longword:
Rn + disp
Rn + R0
Byte: GBR + disp
Word: GBR + disp
Longword:
GBR + disp
GBR + R0
4
4
2
2
23