D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 19

• Manufacturer Part Number: D6417709SHF200BV
• Description: IC SUPER H MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417709SHF200BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 1 Overview and Pin Functions
1.1
1.2
1.3
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
Section 3 Memory Management Unit (MMU)
3.1
3.2
3.3
SH7709S Features .............................................................................................................
Block Diagram ..................................................................................................................
Pin Description ..................................................................................................................
1.3.1
1.3.2
Register Configuration ...................................................................................................... 19
2.1.1
2.1.2
2.1.3
2.1.4
Data Formats ..................................................................................................................... 25
2.2.1
2.2.2
Instruction Features ........................................................................................................... 26
2.3.1
2.3.2
2.3.3
Instruction Set.................................................................................................................... 35
2.4.1
2.4.2
Processor States and Processor Modes.............................................................................. 53
2.5.1
2.5.2
Overview ........................................................................................................................... 55
3.1.1
3.1.2
3.1.3
3.1.4
Register Description .......................................................................................................... 61
TLB Functions................................................................................................................... 63
3.3.1
3.3.2
3.3.3
3.3.4
Pin Function .........................................................................................................
General Registers ................................................................................................. 22
Data Format in Registers ...................................................................................... 25
Data Format in Memory ....................................................................................... 25
Instruction Set Classified by Function.................................................................. 35
Features ................................................................................................................ 55
Configuration of the TLB ..................................................................................... 63
Page Management Information ............................................................................ 68
Pin Assignment ....................................................................................................
Privileged Mode and Banks.................................................................................. 19
System Registers .................................................................................................. 23
Control Registers.................................................................................................. 23
Execution Environment ........................................................................................ 26
Addressing Modes................................................................................................ 28
Instruction Formats............................................................................................... 32
Instruction Code Map ........................................................................................... 50
Processor States.................................................................................................... 53
Processor Modes .................................................................................................. 54
Role of MMU ....................................................................................................... 55
SH7709S MMU.................................................................................................... 58
Register Configuration ......................................................................................... 61
TLB Indexing ....................................................................................................... 65
TLB Address Comparison.................................................................................... 66
....................................................................................................................... 19
Contents
..........................................................................
............................................................ 55
Rev. 5.00, 09/03, page xvii of xliv
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