D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 462
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123130/d6417709shf200bv_sml.jpg)
D6417709SHF200BV
Manufacturer Part Number
D6417709SHF200BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SHF200BV
Core Processor
SH-3
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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13.2.10 Minute Alarm Register (RMINAR)
The minute alarm register (RMINAR) is an 8-bit readable/writable register, and an alarm register
corresponding to the BCD-coded minute section counter RMINCNT of the RTC. When the ENB
bit is set to 1, a comparison with the RMINCNT value is performed. From among the
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR registers, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincide, an RTC alarm interrupt is generated.
The range that can be set is 00–59 (decimal) + ENB bit. Errant operation will result if any other
value is set.
The ENB bit in RMINAR is initialized by a power-on reset. The remaining RMINAR fields are
not initialized and retain their contents by a manual reset, or in standby mode.
13.2.11 Hour Alarm Register (RHRAR)
The hour alarm register (RHRAR) is an 8-bit readable/writable register, and an alarm register
corresponding to the BCD-coded hour section counter RHRCNT of the RTC. When the ENB bit is
set to 1, a comparison with the RHRCNT value is performed. From among the
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR registers, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincide, an RTC alarm interrupt is generated.
The range that can be set is 00–23 (decimal) + ENB bit. Errant operation will result if any other
value is set.
The ENB bit in RHRAR is initialized by a power-on reset. The remaining RHRAR fields are not
initialized and retain their contents by a manual reset, or in standby mode.
Rev. 5.00, 09/03, page 416 of 760
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
ENB
ENB
R/W
R/W
7
0
7
0
R/W
—
—
R
6
6
0
10 minutes
R/W
R/W
—
—
5
5
10 hours
R/W
R/W
—
—
4
4
R/W
R/W
—
—
3
3
R/W
R/W
—
—
2
2
1 minute
1 hour
R/W
R/W
—
—
1
1
R/W
R/W
—
—
0
0
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