D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 425
D6417709SHF200BV
Manufacturer Part Number
D6417709SHF200BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SHF200BV
Core Processor
SH-3
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 425 of 809
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Bit 6—Reserved: This bit can be read or written. The wite value should always be 0.
Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): Select the clock input to CMCNT from
among the four internal clocks obtained by dividing the system clock (P ). When the STR bit in
CMSTR is set to 1, CMCNT0 begins incrementing on the clock selected by CKS1 and CKS0.
Compare Match Counter 0 (CMCNT0)
Compare match counter 0 (CMCNT0) is a 16-bit register used as an up-counter.
When an internal clock is selected with the CKS1 and CKS0 bits in the CMCSR0 register and the
STR bit in CMSTR is set to 1, CMCNT0 begins incrementing on that clock. When the CMCNT0
value matches that of compare match constant register 0 (CMCOR0), CMCNT0 is cleared to
H'0000 and the CMF flag in CMCSR0 is set to 1.
CMCNT0 is initialized to H'0000 by a reset, but retains its previous value in standby mode.
Bit 1: CKS1
0
1
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bit 0: CKS0
0
1
0
1
R/W
R/W
15
0
7
0
R/W
R/W
14
0
6
0
Description
P /4
P /8
P /16
P /64
R/W
R/W
13
0
5
0
R/W
R/W
12
0
4
0
R/W
R/W
11
0
3
0
Rev. 5.00, 09/03, page 379 of 760
R/W
R/W
10
0
2
0
R/W
R/W
9
0
1
0
(Initial value)
R/W
R/W
8
0
0
0
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