D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 301
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123130/d6417709shf200bv_sml.jpg)
D6417709SHF200BV
Manufacturer Part Number
D6417709SHF200BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SHF200BV
Core Processor
SH-3
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 301 of 809
- Download datasheet (5Mb)
Bit 0—Refresh Count Overflow Limit Select (LMTS): Indicates the count limit value to be
compared to the number of refreshes indicated in the refresh count register (RFCR). When the
value in RFCR overflows the value specified by LMTS, the OVF flag is set.
10.2.9
RTCNT is a 16-bit register containing a readable/writable 8-bit counter that counts up on an input
clock. The clock select bits (CKS2–CKS0) in RTCSR select the input clock. When RTCNT
matches RTCOR, the CMF bit in RTCSR is set and RTCNT is cleared. RTCNT is initialized to
H'00 by a power-on reset, but continues incrementing after a manual reset. It is not initialized in
standby mode, but holds its contents.
Note: The method of writing to RTCNT differs from that for general registers to ensure that
Bit 0: LMTS
0
1
Initial value:
Initial value:
RTCNT is not rewritten incorrectly. Use a word transfer instruction to set the upper byte
as B'10100101 and the lower byte as the write data. For details, see section 10.2.12,
Cautions on Accessing Refresh Control Related Registers.
Refresh Timer Counter (RTCNT)
R/W:
R/W:
Bit:
Bit:
Description
Count limit value is 1024
Count limit value is 512
R/W
15
—
0
7
0
R/W
14
—
0
6
0
R/W
13
—
0
5
0
R/W
12
—
0
4
0
R/W
11
—
0
3
0
Rev. 5.00, 09/03, page 255 of 760
R/W
10
—
0
2
0
R/W
—
9
0
1
0
(Initial value)
R/W
—
8
0
0
0
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