D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 790
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123130/d6417709shf200bv_sml.jpg)
D6417709SHF200BV
Manufacturer Part Number
D6417709SHF200BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SHF200BV
Core Processor
SH-3
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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SCSMR1
SCBRR1
SCSCR1
SCFTDR1
SCSSR1
SCFRDR1
SCFCR1
SCFDR1
SCSMR2
SCBRR2
SCSCR2
SCFTDR2
SCSSR2
SCFRDR2
SCFCR2
SCFDR2
SDIR
Notes: 1. Modules:
Rev. 5.00, 09/03, page 744 of 760
Control Register
2. Internal buses:
3. The access size shown is for control register access (read/write). An incorrect result
4. To exclude area 1 control registers from address translation by the MMU, set the first 3
5. With 16-bit access, it is not possible to read data in two registers simultaneously.
6. With 32-bit access, it is possible to read data in the register at [accessed address + 2]
CCN: Cache controller
CPG: Clock pulse generator BSC: Bus state controller
RTC: Realtime clock
TMU: Timer unit
L: CPU, CCN, cache, TLB connected
I: BSC, cache, DMAC, INTC, CPG, and UDI connected
P: BSC and peripheral modules (RTC, TMU, SCI, SCIF, IrDA, A/D, D/A, DMAC,
PORT, CMT) connected
will be obtained if a different size from that shown is used for access.
bits of the logical address to 101, to locate the registers in the P2 space.
simultaneously.
Module *
SCIF
SCIF
SCIF
SCIF
SCIF
SCIF
SCIF
SCIF
IrDA
IrDA
IrDA
IrDA
IrDA
IrDA
IrDA
IrDA
UDI
1
Bus *
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
I
2
UBC: User break controller
INTC: Interrupt controller
SCI: Serial communication interface
4000140
4000142
4000144
4000146
4000148
400014A
400014C
400014E
4000150
4000152
4000154
4000156
4000158
400015A
400015C
400015E
4000200
Address *
4
Size (Bits)
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
Access Size (Bits) *
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
3
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