D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 569

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Bit 5⎯D/A Enable (DAE): Controls D/A conversion, together with bits DAOE0 and DAOE1.
When the DAE bit is cleared to 0, analog conversion is controlled independently in channels 0
and 1. When the DAE bit is set to 1, analog conversion is controlled together in channels 0 and 1.
Output of the conversion results is always controlled independently by DAOE0 and DAOE1.
1
When the DAE bit is set to 1, even if bits DAOE0 and DAOE1 in DACR and the ADST bit in
ADCSR are cleared to 0, the same current is drawn from the analog power supply as during A/D
and D/A conversion.
Bits 4 to 0⎯Reserved: These bits cannot be modified and are always read as 1.
16.2.3
DASTCR is an 8-bit readable/writable register that enables or disables D/A output in software
standby mode.
Bit
Initial value
Read/Write
DASTCR is initialized to H'FE by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 1⎯Reserved: These bits cannot be modified and are always read as 1.
Bit 7
DAOE1
0
1
0
1
D/A Standby Control Register (DASTCR)
Bit 6
DAOE0
0
7
1
0
1
0
1
Bit 5
DAE
6
1
D/A conversion is enabled in channel 0
D/A conversion is disabled in channel 1
D/A conversion is enabled in channels 0 and 1
D/A conversion is disabled in channel 0
D/A conversion is enabled in channel 1
D/A conversion is enabled in channels 0 and 1
D/A conversion is enabled in channels 0 and 1
Description
D/A conversion is disabled in channels 0 and 1
5
1
Reserved bits
4
1
Rev.5.00 Sep. 12, 2007 Page 539 of 764
3
1
D/A standby enable
Enables or disables D/A output
in software standby mode
2
1
1
1
16. D/A Converter
REJ09B0396-0500
DASTE
R/W
0
0

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