D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 725

• Manufacturer Part Number: D13007VX13V
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13007VX13V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

8TCR2⎯Timer Control Register 2
8TCR3⎯Timer Control Register 3
Initial value
Read/Write
Bit
CMIEB
Compare match interrupt enable B
R/W
0
1
7
0
CMIB interrupt requested by CMFB is disabled
CMIB interrupt requested by CMFB is enabled
CMIEA
Compare match interrupt enable A
R/W
0
1
6
0
CMIA interrupt requested by CMFA is disabled
CMIA interrupt requested by CMFA is enabled
Timer overflow interrupt enable
OVIE
R/W
0
1
5
0
OVI interrupt requested by OVF is disabled
OVI interrupt requested by OVF is enabled
Counter clear 1 and 0
CCLR1
0
1
R/W
4
0
0
1
0
1
Clock select 2 to 0
Note: * If the clock input of channel 2 is the 8TCNT3 overflow
CKS2 CKS1 CKS0
CCLR0
Clearing is disabled
Cleared by compare match A
Cleared by compare match B/input capture B
Cleared by input capture B
0
1
R/W
3
0
signal and that of channel 3 is the 8TCNT2 compare
match signal, no incrementing clock is generated. Do
not use this setting.
H'FFF90
H'FFF91
0
1
0
1
CKS2
Rev.5.00 Sep. 12, 2007 Page 695 of 764
R/W
2
0
0
1
0
1
0
1
0
1
Internal clock, counted on rising edge
of φ/8
Internal clock, counted on rising edge
of φ/64
Internal clock, counted on rising edge
of φ/8192
Channel 2:
Channel 3:
External clock, counted on falling edge
External clock, counted on rising edge
External clock, counted on both
rising and falling edges
Clock input is disabled
Appendix B Internal I/O Registers
Count on 8TCNT3 overflow signal*
Count on 8TCNT2 compare match A*
CKS1
R/W
1
0
Description
CKS0
R/W
0
0
8-bit timer channel 2
8-bit timer channel 3
REJ09B0396-0500