HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 183

• Manufacturer Part Number: HD6417708RF100A
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708RF100A

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3.15 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

Mode 1: An external clock is input from the EXTAL pin and its frequency is multiplied by 4 by
PLL circuit 2 before being supplied inside the SH7708 Series, allowing a low-frequency external
clock to be used. An input clock frequency of 5 MHz to 15 MHz can be used, and the CKIO
frequency range is 20 MHz to 60 MHz.
As PLL circuit 1 compensates for fluctuations in the CKIO pin load, this mode is suitable for
connection of synchronous DRAM.
Mode 2: The on-chip crystal oscillator operates, with the oscillation frequency being multiplied by
4 by PLL circuit 2 before being supplied inside the SH7708 Series, allowing a low crystal
frequency to be used. A crystal oscillation frequency of 5 MHz to 15 MHz can be used, and the
CKIO frequency range is 20 MHz to 60 MHz.
As PLL circuit 1 compensates for fluctuations in the CKIO pin load, this mode is suitable for
connection of synchronous DRAM.
Mode 3: An external clock is input from the EXTAL pin and undergoes waveform shaping by
PLL circuit 2 before being supplied inside the SH7708 Series. PLL circuit 1 is off in the default
state at power-on reset, and PLL circuit 1 can be selected as on or off, enabling power
consumption to be kept lower than in mode 0. An input clock frequency of 8 MHz to 15
MHz(SH7708, SH7708S) or 16 MHz to 25 MHz(SH7708R) can be used, and the CKIO frequency
range is of 8 MHz to 15 MHz(SH7708, SH7708S) or 16 MHz to 25 MHz(SH7708R).
Mode 4: The on-chip crystal oscillator operates, with its output supplied inside the SH7708 Series
as a square waveform by PLL circuit 2. PLL circuit 1 is off in the default state at power-on reset,
and PLL circuit 1 can be selected as on or off, enabling power consumption to be reduced
accordingly. A crystal oscillation frequency of of 8 MHz to 15 MHz(SH7708, SH7708S) or 16
MHz to 25 MHz(SH7708R) can be used, and the CKIO frequency range is of 8 MHz to 15
MHz(SH7708, SH7708S) or 16 MHz to 25 MHz(SH7708R).
Mode 7: In this mode, the CKIO pin is an input, an external clock is input to this pin, and
undergoes waveform shaping, and also frequency multiplication according to the setting, by PLL
circuit 1 before being supplied to the SH7708 Series. In modes 0 to 6, the system clock is
generated from the output of the SH7708 Series’ CKIO pin. Consequently, if a large number of
ICs are operating on the clock cycle, the CKIO pin load will be large. This mode, however,
assumes a comparatively large-scale system. If a large number of ICs are operating on the clock
cycle, a clock generator with a number of low-skew clock outputs can be provided, so that the ICs
can operate synchronously by distributing the clocks to each one.
As PLL circuit 1 compensates for fluctuations in the CKIO pin load, this mode is suitable for
connection of synchronous DRAM.
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