HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 347

• Manufacturer Part Number: HD6417708RF100A
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708RF100A

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3.15 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

12.2.9
The second alarm register (RSECAR) is an 8-bit read/write register, and an alarm register
corresponding to the BCD-coded second section counter RSECCNT of the RTC. When the
ENB bit is set to 1, a comparison with the RSECCNT value is performed. From among the
RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, RMONAR registers, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincide, an RTC alarm interrupt is generated.
The range that can be set is 00–59 (decimal) + ENB bit. Errant operation will result if any other
value is set.
The ENB bit in RSECAR is initialized to 0 by a power-on reset. The remaining RSECAR fields
are not initialized by a power-on reset or manual reset, or in standby mode.
12.2.10 Minute Alarm Register (RMINAR)
The minute alarm register (RMINAR) is an 8-bit read/write register, and an alarm register
corresponding to the BCD-coded minute section counter RMINCNT of the RTC. When the ENB
bit is set to 1, a comparison with the RMINCNT value is performed. From among the RSECAR,
RMINAR, RHRAR, RWKAR, RDAYAR, RMONAR registers, the counter and alarm register
comparison is performed only on those with ENB bits set to 1, and if each of those coincide, an
RTC alarm interrupt is generated.
The range that can be set is 00–59 (decimal) + ENB bit. Errant operation will result if any other
value is set.
The ENB bit in RMINAR is initialized by a power-on reset. The remaining RMINAR fields are
not initialized by a power-on reset or manual reset, or in standby mode. Contents are retained in a
manual reset and in standby mode.
Initial value:
Initial value:
Bit name:
Bit name:
Second Alarm Register (RSECAR)
R/W:
R/W:
Bit:
Bit:
ENB
ENB
R/W
R/W
7
0
7
0
R/W
R/W
—
—
6
6
10 seconds
10 minutes
R/W
R/W
—
—
5
5
R/W
R/W
—
—
4
4
R/W
R/W
—
—
3
3
R/W
R/W
—
—
2
2
1 second
1 minute
R/W
R/W
—
—
1
1
R/W
R/W
—
—
0
0
327