HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 52

IC SUPERH MPU ROMLESS 144LQFP

HD6417708RF100A

Manufacturer Part Number
HD6417708RF100A
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708RF100A

Core Processor
SH-2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3.15 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

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Table 2.5
Item
Instruction
mnemonic
Instruction
code
Operation
Privileged
mode
Execution
cycles
T bit
Note: Scaling ( 1, 2, 4) is performed according to the instruction operand size.
32
Instruction Code Format
Format
OP.Sz SRC,DEST
MSB
(xx)
M/Q/T
&
|
~
<<n, >>n
,
LSB
Explanation
OP: Operation code
Sz: Size
SRC: Source
DEST: Destination
Rm: Source register
Rn: Destination register
imm: Immediate data
disp: Displacement
mmmm: Source register
nnnn: Destination register
iiii: Immediate data
dddd: Displacement
Direction of transfer
Memory operand
Flag bits in SR
Logical AND of each bit
Logical OR of each bit
Exclusive OR of each bit
Logical NOT of each bit
n-bit shift
Indicates whether privileged mode applies
Value when no wait states are inserted
The execution cycles listed in the table are minimums. The
actual number of cycles may be increased in cases such
as the following:
1. When contention occurs between instruction fetches
2. When the destination register of the load instruction
Value of T bit after instruction is executed
—: No change
and data access
(memory
instruction are the same
0000: R0
0001: R1
1111: R15
...........
register) and the register used by the next

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