HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 422
HD6417708RF100A
Manufacturer Part Number
HD6417708RF100A
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417708SF60V.pdf
(635 pages)
Specifications of HD6417708RF100A
Core Processor
SH-2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3.15 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Quantity
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Quantity:
10 000
Part Number:
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Manufacturer:
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Quantity:
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Part Number:
HD6417708RF100AV
Manufacturer:
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Quantity:
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14.2.1
The smart card mode register (SCSCMR) is an 8-bit read/write register that selects smart card
interface functions. SCSMR bits 0, 2, and 3 are initialized to 0 by a reset and in standby mode.
Bits 7 to 4 and 1—Reserved: An undefined value will be returned if these bits are read.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion format.
Bit 3: SDIR
0
1
Bit 2—Smart Card Data Inversion (SINV): Specifies whether to invert the logic level of the data.
This function is used in combination with bit 3 for transmitting and receiving with an inverse
convention card. SINV does not affect the logic level of the parity bit. See section 14.3.4, Register
Settings, for information on how parity is set.
Bit 2: SINV
0
1
Bit 0—Smart Card Interface Mode Select (SMIF): Enables the smart card interface function.
Bit 0 : SMIF
0
1
402
Initial value:
Bit name:
Smart Card Mode Register (SCSCMR)
R/W:
Bit:
Description
Contents of SCTDR are transferred LSB first, receive data is stored in
SCRDR LSB first.
Contents of SCTDR are transferred MSB first, receive data is stored in
SCRDR MSB first.
Description
Contents of SCTDR are transferred unchanged, receive data is stored in
SCRDR unchanged.
Contents of SCTDR are inverted before transfer, receive data is inverted
before storage in SCRDR.
Description
Smart card interface function disabled
Smart card interface function enabled
—
—
7
R
—
—
6
R
—
—
5
R
—
—
4
R
SDIR
R/W
3
0
SINV
R/W
2
0
—
—
1
R
(Initial value)
(Initial value)
(Initial value)
SMIF
R/W
0
0
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