HD64F2166VTE33 Renesas Electronics America, HD64F2166VTE33 Datasheet - Page 40

• Manufacturer Part Number: HD64F2166VTE33
• Description: IC H8S MCU FLASH 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2166VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 14 Serial Communication Interface (SCI, IrDA, and CRC)
Table 14.1
Table 14.2
Table 14.3
Table 14.3
Table 14.4
Table 14.5
Table 14.6
Table 14.7
Table 14.8
Table 14.9
Table 14.10
Table 14.11
Table 14.12
Table 14.13
Table 14.14
Table 14.15
Section 15 I
Table 15.1
Table 15.2
Table 15.3
Table 15.3
Table 15.4
Table 15.5
Table 15.6
Table 15.7
Table 15.8
Table 15.9
Table 15.10
Table 15.11
Table 15.12
Table 15.13
Section 16 LPC Interface (LPC)
Table 16.1
Table 16.2
Table 16.3
Table 16.4
Table 16.5
Table 16.6
Rev. 3.00, 03/04, page xxxviii of xl
2
C Bus Interface (IIC)
Pin Configuration.................................................................................................. 355
Relationships between N Setting in BRR and Bit Rate B..................................... 369
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (1) ...... 370
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2) ...... 371
Maximum Bit Rate for Each Frequency (Asynchronous Mode) .......................... 372
Maximum Bit Rate with External Clock Input (Asynchronous Mode) ................ 372
BRR Settings for Various Bit Rates (Clock Synchronous Mode)......................... 373
Maximum Bit Rate with External Clock Input (Clock Synchronous Mode) ........ 373
BRR Settings for Various Bit Rates
(Smart Card Interface Mode, n = 0, s = 372) ........................................................ 374
Maximum Bit Rate for Each Frequency
(Smart Card Interface Mode, S = 372).................................................................. 374
Asynchronous Mode Clock Source Select............................................................ 378
Pin Configuration.................................................................................................. 438
Transfer Format .................................................................................................... 441
I
I
Flags and Transfer States (Master Mode) ............................................................. 452
Flags and Transfer States (Slave Mode) ............................................................... 453
Output Data Hold Time ........................................................................................ 464
ISCMBCR Setting ................................................................................................ 464
I
Examples of Operation Using the DTC ................................................................ 491
Pin Configuration.................................................................................................. 509
LADR1, LADR2 Initial Values ............................................................................ 526
Host Register Selection......................................................................................... 526
Slave Selection Internal Registers ........................................................................ 527
I/O Read and Write Cycles ................................................................................... 568
GA20 (PD3) Set/Clear Conditions........................................................................ 574
2
2
2
C bus Transfer Rate (1) ...................................................................................... 444
C bus Transfer Rate (2) ...................................................................................... 445
C Bus Data Format Symbols.............................................................................. 466
Serial Transfer Formats (Asynchronous Mode)................................................ 381
SSR Status Flags and Receive Data Handling .................................................. 390
IrCKS2 to IrCKS0 Bit Settings......................................................................... 419
SCI Interrupt Sources........................................................................................ 420
SCI Interrupt Sources........................................................................................ 421
IIC Interrupt Source .......................................................................................... 494
I
Permissible SCL Rise Time (t
I
2
2
C Bus Timing (SCL and SDA Outputs)......................................................... 495
C Bus Timing (with Maximum Influence of t
sr
) Values ........................................................... 496
Sr
/t
Sf
)........................................ 498