D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 1131

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Note:
29.4
The A/D converter operates by successive approximations with 10-bit resolution. It has three
operating modes: single mode, multi mode, and scan mode. To avoid malfunction, switch
operating modes while the ADST bit of ADCSR is 0. Changing operating modes and channels and
setting the ADST bit can be performed simultaneously.
29.4.1
In single mode, an analog input for the specified channel is converted once as shown below.
1. A/D conversion of the selected channel starts when the ADST bit of ADCSR is set to 1 by
2. When A/D conversion ends, the conversion results are transmitted to the A/D conversion data
3. When A/D conversion ends, the ADF bit of ADCSR is set to 1. If the ADIE bit in ADCSR is
4. Writing 0 to the ADF bit after reading ADF = 1 clears the ADF bit.
Bit
1
0
software or an external trigger input. The ADST bit holds 1 during A/D conversion and is
automatically cleared to 0 when the A/D conversion ends.
register that corresponds to the channel.
also set to 1, an ADI interrupt is requested at this time.
* Only 0 can be written for clearing the flag.
Bit
Name
CH1
CH0
Operation
Single Mode
Initial
Value
0
0
R/W
R/W
R/W
Description
Channel Select
These bits select the analog input channels together with
the MDS1 bits.
Select the input channels after clearing the ADST bit to 0.
Single Mode
(MDS1 = 0):
00: AN0
01: AN1
10: AN2
11: AN3
Rev. 2.00 Feb. 12, 2010 Page 1047 of 1330
Multi Mode or Scan
Mode (MDS1 = 1):
00: AN0
01: AN0 and AN1
10: AN0 to AN2
11: AN0 to AN3
REJ09B0554-0200