D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 663

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

17.3.3
SCTSR is the register used to transmit serial data.
To perform serial data transmission, the SCIF first transfers transmit data from SCFTDR to
SCTSR, then sends the data to the SCIF_TXD pin starting with the LSB (bit 0).
When transmission of one byte is completed, the next transmit data is transferred from SCFTDR
to SCTSR, and transmission started, automatically.
SCTSR cannot be directly read from and written to by the CPU.
17.3.4
SCFTDR is an 8-bit FIFO register of 128 stages that stores data for serial transmission.
If SCTSR is empty when transmit data has been written to SCFTDR, the SCIF transfers the
transmit data written in SCFTDR to SCTSR and starts serial transmission.
SCFTDR is a write-only register, and cannot be read by the CPU.
The next data cannot be written when SCFTDR is filled with 128 bytes of transmit data. Data
written in this case is ignored.
Transmit Shift Register (SCTSR)
Transmit FIFO Data Register (SCFTDR)
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
W
7
7
-
-
-
W
6
6
-
-
-
W
5
5
-
-
-
W
4
4
-
-
-
W
3
3
-
-
-
Rev. 2.00 Feb. 12, 2010 Page 579 of 1330
W
2
2
-
-
-
W
1
1
-
-
-
W
0
0
-
-
-
REJ09B0554-0200