D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 680

MPU 3V 8K,PB-FREE, 256-BGA

D17760BP200ADV

Manufacturer Part Number
D17760BP200ADV
Description
MPU 3V 8K,PB-FREE, 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of D17760BP200ADV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D17760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
17.3.10 Transmit FIFO Data Count Register (SCTFDR)
SCTFDR is a 16-bit register that indicates the number of transmit data bytes stored in SCFTDR.
SCTFDR can always be read from the CPU.
Initial value:
Bit
15 to 8
7 to 0
17.3.11 Receive FIFO Data Count Register (SCRFDR)
SCRFDR is a 16-bit register that indicates the number of receive data bytes stored in SCFRDR.
SCRFDR can always be read from the CPU.
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 596 of 1330
REJ09B0554-0200
Bit
15 to 8
7 to 0
R/W:
R/W:
Bit:
Bit:
Bit Name
T7 to T0
Bit Name
R7 to R0
15
15
R
R
0
0
-
-
14
14
-
R
-
R
0
0
13
13
R
R
0
0
-
-
Initial Value
All 0
All 0
Initial Value
All 0
All 0
12
12
R
R
0
0
-
-
11
11
R
R
0
0
-
-
10
R/W
R
R
10
R/W
R
R
R
R
0
0
-
-
R
R
9
0
9
0
-
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
These bits show the number of untransmitted
data bytes in SCFTDR. A value of H'0000
indicates that there is no transmit data, and a
value of H'0080 indicates that SCFTDR is full of
transmit data.
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
These bits show the number of receive data
bytes in SCFRDR. A value of H'0000 indicates
that there is no receive data, and a value of
H'0080 indicates that SCFRDR is full of receive
data.
R
R
8
0
8
0
-
-
T7
R7
R
R
7
0
7
0
R6
T6
R
R
6
0
6
0
R5
T5
R
R
5
0
5
0
R4
T4
4
0
R
4
0
R
R3
T3
R
R
3
0
3
0
T2
R2
2
0
R
2
0
R
R1
T1
R
R
1
0
1
0
R0
T0
R
R
0
0
0
0

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