D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 581

MPU 3V 8K,PB-FREE, 256-BGA

D17760BP200ADV

Manufacturer Part Number
D17760BP200ADV
Description
MPU 3V 8K,PB-FREE, 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of D17760BP200ADV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D17760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.4.3
MCKCR is a 32-bit readable/writable register that specifies the frequency division ratio of the
module clock (Fck).
Initial value:
Initial value:
Bit
1
0
Bit
31 to 4
3
2
1
0
R/W:
R/W:
Bit:
Bit:
DIV1
DIV0
FLMCK3
FLMCK2
FLMCK1
FLMCK0
Bit Name
Module Clock Control Register (MCKCR)
Bit Name
31
15
R
R
0
0
-
-
30
14
-
R
-
R
0
0
29
13
R
R
0
0
-
-
Initial Value
0
1
Initial Value
All 0
0
0
0
0
28
12
R
R
0
0
-
-
27
11
R
R
0
0
-
-
26
10
R
R
0
0
-
-
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
25
R
R
-
-
0
9
0
Description
Frequency Division Ratio Setting
These bits specify the DCK clock frequency
division ratio with respect to the CKIO clock.
00: Setting prohibited
01: CKIO × 1/1
10: CKIO × 1/2
11: CKIO × 1/3
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Module Clock Frequency Division Ratio Setting
These bits specify the Fck clock frequency
division ratio with respect to the peripheral clock.
0000: Peripheral clock × 1/1
0001: Setting prohibited
0010: Setting prohibited
0011: Setting prohibited
Other than above: Setting prohibited
24
R
R
0
8
0
-
-
23
R
R
0
7
0
-
-
Rev. 2.00 Feb. 12, 2010 Page 497 of 1330
22
R
R
0
6
0
-
-
21
R
R
0
5
0
-
-
20
R
R
0
4
0
-
-
FLM
CK3
R/W
19
R
0
3
0
-
REJ09B0554-0200
FLM
CK2
R/W
18
R
0
2
0
-
FLM
CK1
R/W
17
R
0
1
0
-
FLM
CK0
R/W
16
R
0
0
0
-

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