D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 465

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Figure 11.2 shows a block diagram of the DMABRG.
For data transfer in DMABRG mode between synchronous DRAM and the LCDC, HAC, SSI, or
USB, the DMABRG performs a high-speed data transfer via the DMABRG internal FIFO (32-bit
16-stage) using DMAC channel 0. The DMABRG transfers a maximum of 32-byte data in a single
transfer.
On-chip peripheral
HAC(0)/
HAC(1)/
SSI(0)
module
SSI(1)
LCDC
USB
HAC(0)/SSI(0)
HAC(1)/SSI(1)
bridge bus
bridge bus
bridge bus
bridge bus
LCDC
USB
Figure 11.2 DMABRG Block Diagram
Synchronous DRAM
DMAC
External bus
16-stage 32-bit FIFO
16-stage 32-bit FIFO
16-stage 32-bit FIFO
16-stage 32-bit FIFO
16-stage 32-bit FIFO
16-stage 32-bit FIFO
16-stage 32-bit FIFO
DMABRG
DMAARXTCNT0
DMAATXTCNT0
DMAARXDAR0
DMAARXTCR0
DMAATXSAR0
DMAATXTCR0
DMABRGCR
DMAUSAR
DMAUDAR
DMAACR0
Rev. 2.00 Feb. 12, 2010 Page 381 of 1330
Transfer request
priority control
DMAARXTCNT1
DMAATXTCNT1
DMAARXDAR1
DMAARXTCR1
DMAATXSAR1
DMAATXTCR1
DMAURWSZ
DMAACR1
DMAUCR
REJ09B0554-0200
Bus state
controller