D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 1180

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

5. Packed 2bpp (Pixel Alignment in Byte is Little Endian)
6. Packed 4bpp (Pixel Alignment in Byte is Little Endian)
7. Unpacked 4bpp [Windows CE Recommended Format]
8. Unpacked 5bpp [Windows CE Recommended Format]
Rev. 2.00 Feb. 12, 2010 Page 1096 of 1330
REJ09B0554-0200
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
MSB
MSB
MSB
MSB
P03
P07
P13
P17
7
7
7
7
6
6
6
6
P01
P04
P06
P11
P13
P15
Display Memory
Display Memory
Display Memory
Display Memory
P02
P06
P12
P16
5
5
5
5
…
…
…
…
…
…
…
…
4
4
4
4
P01
P05
P11
P15
3
3
3
3
P00
P01
P02
P10
P11
P12
2
2
2
2
P00
P03
P05
P10
P12
P14
P00
P01
P02
P10
P11
P12
P00
P04
P10
P14
1
1
1
1
LSB
LSB
LSB
LSB
0
0
0
0
[Bit]
(Byte0)
(Byte1)
[Bit]
(Byte0)
(Byte1)
(Byte2)
[Bit]
(Byte0)
(Byte1)
(Byte2)
[Bit]
(Byte0)
(Byte1)
(Byte2)
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
↓ Top Left Pixel
↓ Top Left Pixel
↓ Top Left Pixel
↓ Top Left Pixel
LAO: Line Address Offset
LAO: Line Address Offset
LAO: Line Address Offset
LAO: Line Address Offset
Pn = Pn[1:0]: Put 2bit data
Pn = Pn[3:0]: Put 4bit data
Pn = Pn[3:0]: Put 4bit data
Pn = Pn[4:0]: Put 5bit data
—Unused bits should be 0
—Unused bits should be 0
—Unused bits should be 0
—Unused bits should be 0
Display
Display
Display
Display
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…