UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 240

• Manufacturer Part Number: UPD78F1201MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1201MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

EXCLK OSCSEL OSCSELS
0
1
×
×
×
238
Notes 1. OSCSELS and XTSTOP bits are not provided in the 78K0R/IB3.
Remark ×:
The bits related to the selection of the CPU/peripheral hardware clock (f
CMC register
1
1
×
×
×
2. Changing the MCM0 bit value while CSS is set to 1 is prohibited.
3. The 78K0R/IB3 doesn’t have the subsystem clock.
4. The supply of a clock of 20 MHz is supplied, because the clock supplied to a CPU or peripheral
Table 5-4. Relationship Between CPU/Peripheral Hardware Clock (f
hardware that does not support 40 MHz is halved (f
to 1.
don’t care
×
×
×
1
×
Note 1
MSTOP XTSTOP
0
0
×
×
×
CSC register
×
×
×
0
×
Note 1
CHAPTER 5 CLOCK GENERATOR
HIOSTOP CSS MCM0 SELDSC
User’s Manual U19678EJ1V1UD
×
×
0
×
0
CKC register
0
0
0
1
0
×
Note 2
CLK
1
1
0
0
/2) by setting DSPO (bit 1 of the DSCCTL register)
0
0
0
0
1
DSCCTL register
CLK
) are shown below.
DSPO DSCON
0
0
0
0
1
CLK
) and Bit Settings
×
×
×
×
1
High-speed system clock
(X1 oscillation)
(2 to 20 MHz)
High-speed system clock
(external input clock)
(2 to 20 MHz)
Internal high-speed
oscillation clock
(8 MHz (TYP.))
Subsystem Clock
(32.768 kHz)
40 MHz internal high-
speed oscillation clock
(40 MHz(TYP.))
CPU/Peripheral Hardware
Clock (f
CLK
Note 4
Note 3
)